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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| QIT (2nd) |
2023-12-18 15:50 |
Okinawa | OIST (Primary: On-site, Secondary: Online) |
Quantum Circuit Unoptimization and Its Application to Compiler Benchmark Yusei Mori (Osaka Univ.), Hideaki Hakoshima (QIQB), Kyohei Sudo (Osaka Univ.), Toshio Mori (QIQB), Kosuke Mitarai (Osaka Univ.), Keisuke Fujii (Osaka Univ./RQC) |
We initiate and construct a quantum algorithmic primitive called quantum circuit unoptimization, which makes a given qua... [more] | |
| QIT (2nd) |
2023-12-17 17:30 |
Okinawa | OIST (Primary: On-site, Secondary: Online) |
[Poster Presentation]
Practical algorithm for optimal Clifford+T approximation of SU(2) Hayata Morisaki (Osaka Univ.) |
In this paper, we consider the problem of approximating arbitrary single-qubit unitaries with a given precision $epsilon... [more] | |
| SS, KBSE, IPSJ-SE [detail] | 2023-07-20 15:15 |
Hokkaido | (Primary: On-site, Secondary: Online) |
Instruction Scheduling for GPUs Utilizing Subwarp Interleaving Junji Fukuhara, Munehiro Takimoto (TUS)  SS2023-4 KBSE2023-15 |
Graphics Processing Units (GPUs) exploit the Single-Instruction Multiple-Thread (SIMT) execution model, which causes bra... [more] | SS2023-4 KBSE2023-15 pp.19-24 |
| ISEC | 2023-05-17 15:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
An Empirical Study of Impact of Solidity Compiler Updates on Vulnerabilities (from BRAIN 2023) Chihiro Kado, Naoto Yanai, Jason Paul Cruz (Osaka Univ.), Shingo Okamura (NIT, Nara College) ISEC2023-11 |
Vulnerabilities are an important issue in Ethereum smart contracts. Although various vulnerability analysis tools have b... [more] | ISEC2023-11 pp.62-64 |
| QIT (2nd) |
2022-05-31 13:10 |
Online | Online | Compiler Backend for Surface Code Quantum Computing by Lattice Surgery Ryo Wakizaka (Kyoto Univ), Yasunari Suzuki, Yuuki Tokunaga (NTT) |
Recently, surface code using lattice surgery has been studied widely because it may realize large-scale and fault-tolera... [more] | |
| RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] | 2022-01-25 16:40 |
Online | Online | Testing of Optimization Performance of Android DEX Compilers Based on Native Code Comparison Naoki Yoshida, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2021-74 CPSY2021-43 RECONF2021-82 |
This paper presents a method for testing optimizing performance of Android DEX compilers based on comparison of resultin... [more] | VLD2021-74 CPSY2021-43 RECONF2021-82 pp.143-147 |
| CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] | 2021-01-26 15:05 |
Online | Online | Detection of Vulnerability Inducing Code Optimization Based on Binary Code Yuka Azuma, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2020-65 CPSY2020-48 RECONF2020-84 |
In this paper, we propose a method to detect vulnerability inducing code elimination by compiler optimization. It is re... [more] | VLD2020-65 CPSY2020-48 RECONF2020-84 pp.148-153 |
| CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] | 2021-01-26 15:30 |
Online | Online | Performance Testing of VRP Optimization of C Compilers by Random Program Generation Daiki Murakami, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2020-66 CPSY2020-49 RECONF2020-85 |
This paper proposes an automated method to test if C compilers properly perform VRP optimization. The VRP optimization i... [more] | VLD2020-66 CPSY2020-49 RECONF2020-85 pp.154-159 |
| ET | 2020-03-07 10:35 |
Kagawa | National Institute of Technology, Kagawa Collage (Cancelled but technical report was issued) |
Development of a visual learning tool for compiler behavior Hiroaki Hiranishi, Yoshiro Imai, Yoichi Sugimoto (Kagawa Univ.) ET2019-97 |
This paper proposes an educational tool, which can visualize the internal processing of the compiler. One of the purpose... [more] | ET2019-97 pp.121-126 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2020-02-28 10:55 |
Kagoshima | Yoron-cho Chuou-Kouminkan | Extension of OSCAR Compiler for Parallelizing C++ Programs Tohma Kawasumi, Tilman Priesner, Masato Noguchi, Jixin Han, Hiroki Mikami (Waseda Univ.), Akihiro Kawashima, Keishiro Tanaka (OscarTechnology Corp.), Keiji Kimura, Hironori Kasahara (Waseda Univ.) CPSY2019-110 DC2019-116 |
With the increasing focuses on multicore processors, the OSCAR compiler is known as an automatically parallelizing compi... [more] | CPSY2019-110 DC2019-116 pp.151-156 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-22 15:25 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Increasing Test Variation for C Compilers by Equivalent Mutant Generation Hiroki Maeda, Nagisa ishiura (Kwansei Gakuin Univ.) VLD2019-61 CPSY2019-59 RECONF2019-51 |
This article proposes a method of increasing variation of test programs in automatic testing of C compilers by means of ... [more] | VLD2019-61 CPSY2019-59 RECONF2019-51 pp.43-48 |
| DC, CPSY, IPSJ-ARC [detail] | 2019-06-12 09:00 |
Kagoshima | National Park Resort Ibusuki | CPSY2019-9 DC2019-9 |
At present, the benefits of power reduction and cost reduction due to the miniaturization of semiconductors are lost, an... [more] | CPSY2019-9 DC2019-9 pp.71-76 |
| CPSY, DC, IPSJ-ARC [detail] | 2018-06-15 13:10 |
Yamagata | Takamiya Rurikura Resort | Implementation of Code Generation for Parallel Processing Based on Parallelization Directives in LLVM IR Code Kengo Jingu, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2018-6 DC2018-6 |
Nowadays, multi-core processors are widely used, and the speedup can be accomplished by thread-level parallel processing... [more] | CPSY2018-6 DC2018-6 pp.107-112 |
| VLD, HWS (Joint) |
2018-02-28 13:55 |
Okinawa | Okinawa Seinen Kaikan | Congestion Aware High Level Synthesis Design Flow with Source Compiler Masato Tatsuoka, Mineo Kaneko (JAIST) VLD2017-96 |
When we use a high level synthesis (HLS) tool, the optimization of input code is necessary for obtaining an optimized ... [more] | VLD2017-96 pp.43-48 |
| IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2018-01-19 16:15 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Reinforcing Generation of Control Flow Statements in Random Test System of C Compilers Based on Equivalence Transformation Mitsuyoshi Iwatsuji, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2017-87 CPSY2017-131 RECONF2017-75 |
This article proposes a method of reinforcing generation of control statements in random testing of compilers based on e... [more] | VLD2017-87 CPSY2017-131 RECONF2017-75 pp.163-168 |
| KBSE | 2016-03-03 15:20 |
Oita | [Invited Talk]
Model-Driven Development Embracing Uncertainty Naoyasu Ubayashi (Kyushu Univ.) KBSE2015-56 |
Embracing uncertainty in software development is one of the crucial research topics in software engineering. Garlan, D. ... [more] | KBSE2015-56 p.49 |
|
| VLD | 2016-02-29 13:55 |
Okinawa | Okinawa Seinen Kaikan | Random Testing of C Compilers Based on Test Program Generation by Equivalence Transformation Kazuhiro Nakamura, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2015-112 |
This article proposes a method of generating test programs for random testing of C compilers based on equivalence transf... [more] | VLD2015-112 pp.7-12 |
| VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] | 2016-01-20 14:15 |
Kanagawa | Hiyoshi Campus, Keio University | Design of Stencil Computation based on Building-Cube Method on an FPGA Accelerator with High Level Synthesis Rie Soejima, Koji Okina, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2015-91 CPSY2015-123 RECONF2015-73 |
In building-cube method (BCM), which is one of the adaptive mesh refinement, the computational region is divided into a ... [more] | VLD2015-91 CPSY2015-123 RECONF2015-73 pp.125-130 |
| ET | 2015-10-31 17:05 |
Oita | Nippon Bunri Univ. (Yufuin Training Institute) | Development of a Model-Driven Development based Educational Model Compiler for UML Modeling Education for Designing Operation Control Method for Robot Masaki Tajima, Mizue Kayama, Shinpei Ogata, Masami Hashimoto (Shinshu Univ.) ET2015-54 |
The purpose of this study is to expand learning environment for UML modeling education. In our study, we focus on the e... [more] | ET2015-54 pp.61-66 |
| RECONF | 2015-06-20 17:15 |
Kyoto | Kyoto University | High-Level Synthesis Compiler for Hierarchical and Modular Design of Stream Computing Cores Kentaro Sano, Ryo Ito, Keisuke Sugawara, Satoru Yamamoto (Tohoku Univ.) RECONF2015-29 |
Although FPGA-based custom hardware is expected for low-power and high-performance computation, productivity improvement... [more] | RECONF2015-29 pp.159-164 |
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