Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
HWS, VLD [detail] |
2020-03-06 14:30 |
Okinawa |
Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
A Test Generation Method for Resistive Open Faults Using Partial MAX-SAT solver Hiroshi Yamazaki, Yuta Ishiyama, Tatsuma Matsuta, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) VLD2019-131 HWS2019-104 |
In VLSI testing, stuck-at fault model and transition fault model have been widely used. However, with advance of semicon... [more] |
VLD2019-131 HWS2019-104 pp.215-220 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2019-03-18 09:00 |
Kagoshima |
Nishinoomote City Hall (Tanega-shima) |
A Test Generation Method for Resistive Open Faults Using MAX-SAT Problem Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) CPSY2018-117 DC2018-99 |
In VLSI testing, stuck-at fault model and transition fault model have been widely used. However, with advance of semicon... [more] |
CPSY2018-117 DC2018-99 pp.315-320 |
DC |
2016-02-17 10:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Reduction of open fault test pattern generation time by selection of adjacent lines for assigning logic value Kazui Fujitnai, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.) DC2015-88 |
As semiconductor technology is scaling down, open defects have often occurred at interconnect lines and vias. If logic v... [more] |
DC2015-88 pp.13-18 |
LQE, EST, OPE, EMT, PN, MWP, IEE-EMT, PEM [detail] |
2016-01-28 09:05 |
Hyogo |
|
Synthesis of UWB Filter Consisting of SIR and Three-Coupled-lines by Successive Iterations Chun-Ping Chen, Noriki Kato, Tetsuo Anada (Kanagawa Univ.), Shigeki Takeda (Antenna Giken), Zhewang Ma (Saitama Univ.) PN2015-59 EMT2015-110 OPE2015-172 LQE2015-159 EST2015-116 MWP2015-85 |
Since the coupling between the three-parallel-coupled-lines is stronger than that between traditional two-parallel-coupl... [more] |
PN2015-59 EMT2015-110 OPE2015-172 LQE2015-159 EST2015-116 MWP2015-85 pp.159-164 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 14:40 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
On discrimination method of a resistive open using delay variation induced by signal transitions on adjacent lines Kotaro Ise, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.) VLD2015-42 DC2015-38 |
The effect of a resistive open results in small delay in an IC. It is difficult to test small delay since signal delay a... [more] |
VLD2015-42 DC2015-38 pp.31-36 |
RCS, SR, SRW (Joint) |
2015-03-04 09:00 |
Tokyo |
Tokyo Institute of Technology |
A Study on Estimation of Amplifier Nonlinearity for Adjacent Channel Interference Cancellation in Millimeter Wave Communication Systems Noboru Osawa, Shinsuke Ibi, Kei Sakaguchi, Seiichi Sampei (Osaka Univ.) RCS2014-308 |
This paper proposes an estimation method of amplifier nonlinearity for adjacent channel interference (ACI) cancellation ... [more] |
RCS2014-308 pp.41-46 |
MWP, EMT, PN, LQE, OPE, EST, IEE-EMT [detail] |
2014-01-23 10:30 |
Kyoto |
Doshisha University |
An Iterative Synthesis Scheme for Wideband Filters Based on Parallel-Coupled Three-line Including the Cross-Coupling Between Non-Adjacent Lines Chun-Ping Chen, Junya Oda, Takemasa Kato, Katsuhiro Kamata, Noriki Kato, Tetsuo Anada (Kanagawa Univ.) PN2013-37 OPE2013-151 LQE2013-137 EST2013-86 MWP2013-57 |
An improved equivalent circuit for parallel-coupled three-line is derived by taking the cross-coupling between non-adjac... [more] |
PN2013-37 OPE2013-151 LQE2013-137 EST2013-86 MWP2013-57 pp.17-22 |
DC |
2013-02-13 13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Characteristic Analysis of Signal Delay for Resistive Open Fault Detection Hiroto Ohguri, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.) DC2012-84 |
When a resistive open fault occurs, signal delay at the faulty wire may degrade circuit performance. However, a resistiv... [more] |
DC2012-84 pp.25-30 |
DC |
2012-06-22 14:20 |
Tokyo |
Room B3-1 Kikai-Shinko-Kaikan Bldg |
[Invited Talk]
Empirical study for signal integrity-defects Hiroshi Takahashi, Yoshinobu Higami (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. Tokushima) DC2012-12 |
We try to empirically study signal integrity-defects.
In this study, we analyze the resistive open fault that causes th... [more] |
DC2012-12 pp.21-26 |
DC |
2010-02-15 10:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Modeling resistive open faults and generating their tests Hiroshi Takahashi, Yoshinobu Higami, Yuta Shudo, Yuji Takamune, Yuzo Takamatsu (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) DC2009-68 |
In order to solve the problem of signal integrity, we propose an extended delay fault model for modeling a resistive ope... [more] |
DC2009-68 pp.19-24 |
MW |
2009-09-25 17:15 |
Tokyo |
Univ. of Electro-Communications |
[Special Talk]
Anlysis and Design of a Dynamic Predistorter for WCDMA Handsets Power Amplifier Shingo Yamanouchi, Yuuichi Aoki, Kazuaki Kunihiro (NEC), Tomohisa Hirayama (NEC Electronics Corp.), Takashi Miyazaki (NEC), Hikaru Hida (NEC Electronics Corp.) MW2009-90 |
This paper presents a dynamic predistorter (PD), which linearizes dynamic AM-AM and AM-PM of a wide-band CDMA (WCDMA) ha... [more] |
MW2009-90 pp.93-98 |
DC |
2009-02-16 14:15 |
Tokyo |
|
On Tests to Detect Open faults with Considering Adjacent Lines Tetsuya Watanabe, Hiroshi Takahashi, Yoshinobu Higami (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ, Tokushima), Yuzo Takamatsu (Ehime Univ.) DC2008-74 |
In modern manufacturing technologies with the shrinking of manufacturing process, LSIs may have several metal interconne... [more] |
DC2008-74 pp.37-42 |
DC |
2008-06-20 15:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg |
Improving the Diagnostic Quality of Open Faults Koji Yamazaki, Toshiyuki Tsutsumi (Meiji Univ.), Hiroshi Takahashi, Yoshinobu Higami, Takashi Aikyo (Ehime Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.), Yuzo Takamatsu (Ehime Univ.) DC2008-16 |
With the shrinking process technologies and the use of copper process, open defects on interconnect wires, contacts and ... [more] |
DC2008-16 pp.29-34 |
RCS, AN, MoNA, SR, WBS (Joint) |
2008-03-05 17:50 |
Kanagawa |
YRP |
Performance Evaluation on Interference-Resistance of a Multi-Gbps WPAN 60GHz System Chin-Sean Sum, Ryuhei Funada, Junyi Wang, Tuncer Baykas, Ming Lei, Yoshinori Nishiguchi, Ryota Kimura, Mohammad Azizur Rahman, Yozo Shoji, Hiroshi Harada, Shuzo Kato (NICT) RCS2007-207 |
This paper presents the performance evaluation of a multi-Gbps 60GHz single carrier wireless personal area network (WPAN... [more] |
RCS2007-207 pp.127-131 |