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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD 2010-03-11
10:50		 Okinawa   Wiring delay of Logic Element used in Via programmable logic device VPEX
Tomohiro Nishimoto, Tatsuya Kitamori, Yuuichi Kokushou, Shouta Yamada (Ritsumeikan Univ), Masaya Yoshikawa (Meijou Univ), Takeshi Fujino (Ritsumeikan Univ) VLD2009-109		 We have been studied the via-programmable-device VPEX (Via Programmable logic using EXclusive or array) whose logic elem... [more] VLD2009-109
pp.61-66
VLD 2009-03-12
09:15		 Okinawa   Chip evaluation and implimentation of DES encryption using via-programmable-device VPEX
Masahide Kawarasaki, Tomohiro Nishimoto, Yuuichi Kokushou, Kazuma Kitamura, Shouta Yamada (Ritsumeikan Univ.), Masaya Yoshikawa (Meijyou Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2008-139		 We have been studied the via-programmable-device VPEX (Via Programmable logic using EXclusive or array) whose logic elem... [more] VLD2008-139
pp.77-82
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