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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 39  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
SIP, SP, EA, IPSJ-SLP [detail] 2024-02-29
09:30
Okinawa
(Primary: On-site, Secondary: Online)
Vocal tract length perturbation-based pseudo-speaker augmentation for automatic speaker verification
Tomoka Wakamatsu, Sayaka Shiota, Hitoshi Kiya (Tokyo Metropolitan Univ.) EA2023-61 SIP2023-108 SP2023-43
In recent years, deep neural network (DNN)-based automatic speaker verification (ASV) systems have become mainstream. Da... [more] EA2023-61 SIP2023-108 SP2023-43
pp.1-6
ITS, WBS, RCC 2023-12-22
11:45
Okinawa
(Primary: On-site, Secondary: Online)
Study on Simulation for Safety Verification in Automated Bus Driving
Hyo Okawa, Jeyeon Kim (NITTC), Yanbin Wu, Kouya Takahashi, Toru Kumagai, Naohisa Hashimoto (AIST) WBS2023-55 ITS2023-38 RCC2023-49
Safety verification under real-world conditions in automated driving involves various problems such as cost and physical... [more] WBS2023-55 ITS2023-38 RCC2023-49
pp.138-143
MSS, NLP 2022-03-29
14:55
Online Online Verification of spacecraft operational scenario using Little-JIL
Kazunori Someya (JAXA), Kunihiko Hiraishi (JAIST) MSS2021-78 NLP2021-149
Inadequate operational scenario leads to satellite loss in the case of the operational accident of the X-ray astronomy s... [more] MSS2021-78 NLP2021-149
pp.121-126
QIT
(2nd)
2021-12-01
14:00
Online Online Divide-and-conquer verification method for noisy intermediate-scale quantum computation
Yuki Takeuchi, Yasuhiro Takahashi (NTT), Tomoyuki Morimae (Kyoto Univ.), Seiichiro Tani (NTT)
Several noisy intermediate-scale quantum computations can be regarded as logarithmic-depth quantum circuits on a sparse ... [more]
VLD, DC, RECONF, ICD, IPSJ-SLDM
(Joint) [detail]
2020-11-18
13:00
Online Online [Keynote Address] Quality Assurances of the Fugaku Supercomputer: Function, Performance and Power
Takahide Yoshikawa (FLAB) VLD2020-36 ICD2020-56 DC2020-56 RECONF2020-55
The Fugaku Supercomputer has about 160,000 CPUs, and once a problem occurs after assembling, it is challenging to fix. I... [more] VLD2020-36 ICD2020-56 DC2020-56 RECONF2020-55
p.138
KBSE, SC 2019-11-08
15:40
Nagano Shinshu University A Case-study for Developpment and Verification of an Embedded System
Kozo Okano, Shinpei Ogata, Miki Natsume (Shinshu Univ.) KBSE2019-30 SC2019-27
Through a development of an embedded system and design verification, we report on the issues and workload when novice en... [more] KBSE2019-30 SC2019-27
pp.41-46
CS 2019-07-04
09:00
Kagoshima Amami City Social Welfare Center Trust-based Verification Attack Prevention Scheme using Tendency of Contents Request on NDN
Hironori Nakano, Hiroya Kato, Shuichiro Haruta, Masashi Yoshida, Iwao Sasase (Keio Univ.) CS2019-13
In this paper, we propose a trust-based verification attack prevention scheme using tendency of contents request on NDN.... [more] CS2019-13
pp.1-6
SS 2019-03-04
17:10
Okinawa   Formal STAMP Modelling toward Safety Verification of Hybrid Systems
Mitsuaki Tsuji, Toshinori Takai (NAIST), Masafumi Katahira, Naoki Ishihama (JAXA), Kazuki Kakimoto, Hajimu Iida (NAIST) SS2018-67
Safety-critical systems, for example, autonomous vehicles and space systems, are required to be safe and reliable. Recen... [more] SS2018-67
pp.91-96
SS, MSS 2018-01-18
15:05
Hiroshima   Deadline Assignment Optimization Method Using Extended Time Petri Nets for Real-Time Multitask Distributed Systems Sharing Processors with EDF Scheduling
Reon Matsuoka, Akio Nakata (Hiroshima City Univ.) MSS2017-56 SS2017-43
In the development of embedded software which requires high reliability satisfaction of hard requirements for both compu... [more] MSS2017-56 SS2017-43
pp.53-58
SS, KBSE, IPSJ-SE [detail] 2017-07-19
11:10
Hokkaido   Reliability Verification of Dynamic Information in Dynamic Map for Vehicles
Yosuke Watanabe (Nagoya Univ.), Shuichi Sato (TCRDL), Hiroyuki Seki, Shoji Yuen (Nagoya Univ.) SS2017-3 KBSE2017-3
In automotive industry, high-precision spatial information such as the LDM(Local Dyanamic Map), that includes dynamic ob... [more] SS2017-3 KBSE2017-3
pp.13-18
NS, IN
(Joint)
2017-03-02
11:20
Okinawa OKINAWA ZANPAMISAKI ROYAL HOTEL A study on abstraction of configuration in network equipment
Masato Hirose, Kunio Akashi, Yoichi Shinoda (JAIST)
Network operator was possible to apply configurations to each network devices without mistake at the beginning of the In... [more]
RCS 2016-10-20
13:00
Kanagawa YRP (Yokosuka) [Invited Lecture] A Study of 4G LTE/5G Coexistence on the Same Frequency Band
Kazuhide Toda, Masaya Shibayama, Kazuya Moriwaki, Yasuhiro Suegara (KDDI R&D Labs) RCS2016-165
It is considered that high frequency band will be allocated for 5G service. High frequency band is suitable for high thr... [more] RCS2016-165
pp.71-76
SS, MSS 2016-01-25
18:30
Ishikawa Shiinoki-Geihin-Kan A Study of a Practical Approach to Verifying Control Systems using Model-Checking and Testing
Junya Matsubara, Rieko Takagi, Teruyuki Nakazawa (Denso Create), Tetsuya Tohdo, Hiroyuki Ihara, Yukinori Kawaai (Denso) MSS2015-52 SS2015-61
Due to the automotive control systems have become complex, it is necessary to ensure the dependability of the systems. I... [more] MSS2015-52 SS2015-61
pp.99-103
SS, MSS 2016-01-26
11:55
Ishikawa Shiinoki-Geihin-Kan Modeling and Performance Verification of Embedded Software Sharing Resources with Least Laxity First Schedulers Using Extended Time Petri Nets
Takafumi Nakamura, Akio Nakata (Hiroshima City Univ.) MSS2015-59 SS2015-68
In the development of embedded software which requires high reliability satisfaction of hard requirements for both compu... [more] MSS2015-59 SS2015-68
pp.135-140
SS 2015-05-11
16:30
Kumamoto Kumamoto University Modeling and Performance Verification of Embedded Software in Multiprocessor Environment Using Extended Time Petri Nets
Takafumi Nakamura, Akio Nakata (Hiroshima City Univ.) SS2015-7
In the development of embedded software which requires high reliability satisfaction of hard requirements for both compu... [more] SS2015-7
pp.33-37
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-07
14:15
Kagoshima   Speed Up co-Simulation for Verification of Embedded Systems
Hiroaki Nakata, Kenta Morishima, Yasuo Sugure (Hitachi) CPSY2014-183 DC2014-109
In order to apply co-simulation method to verification of many embedded systems, we speeded up co-simulation between a m... [more] CPSY2014-183 DC2014-109
pp.137-142
VLD, IPSJ-SLDM 2014-05-29
11:05
Fukuoka Kitakyushu International Conference Center Proposal of a Synthesis Flow for Asynchronous Circuits with Bundled-Data Implementation from a SystemC Model
Taichi Komine, Hiroshi Saito (Univ. of Aizu) VLD2014-5
This paper proposes a synthesis flow for asynchronous circuits with bundled-data implementation from a SystemC model to ... [more] VLD2014-5
pp.21-26
VLD 2014-03-05
15:45
Okinawa Okinawa Seinen Kaikan A Case Study of Symbolic Model Checking for Verilog-HDL Hardware Design
Tomoyuki Yokogawa, Daichi Higashiyama (Okayama Pref. Univ.), Masafumi Kondo (Kawasaki Univ. of Medical Welfare), Yoichiro Sato, Kazutami Arimoto (Okayama Pref. Univ.) VLD2013-166
In this paper, we show a case study where a design of 8bit microcomputer M8R, which is described by Verilog-HDL, is veri... [more] VLD2013-166
pp.177-182
SS, MSS 2014-01-30
14:50
Aichi   A Method for Extracting Necessary Information for Performance Verification from Extended SysML Diagrams
Yusuke Motoie, Akio Nakata (Hiroshima City Univ.) MSS2013-55 SS2013-52
Achieving performance requirements under severe resource constraints is one of the most important design issues in embed... [more] MSS2013-55 SS2013-52
pp.23-28
KBSE 2013-03-15
11:25
Tokyo Shibaura Institute of Technology A proposal on architecture based verification case
Shuichiro Yamamoto (Nagoya Univ.) KBSE2012-82
Although formal method is attracted to verify system correctness, it is not practical to verify every property of system... [more] KBSE2012-82
pp.79-83
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