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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| DC, CPSY, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2024-03-22 09:50 |
Nagasaki | Ikinoshima Hall (Primary: On-site, Secondary: Online) |
Integration of Vector Extension and Simultaneous Multithreading for a RISC-V Processor Hidetaro Tanaka, Shogo Takata, Hironori Nakajo (TUAT)  CPSY2023-43 DC2023-109 |
In vector architectures, the potential for parallel execution lies in the chaining of instruction sequences. However, a ... [more] | CPSY2023-43 DC2023-109 pp.29-34 |
| VLD, HWS [detail] | 2022-03-07 13:15 |
Online | Online | [Memorial Lecture]
An Accuracy Reconfigurable Vector Accelerator based on Approximate Logarithmic Multipliers Lingxiao Hou, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) VLD2021-83 HWS2021-60 |
The logarithmic approximate multiplier proposed by Mitchell provides an efficient alternative to accurate multipliers in... [more] | VLD2021-83 HWS2021-60 p.43 |
| SS, MSS | 2022-01-12 09:40 |
Nagasaki | Nagasakiken-Kensetsu-Sogo-Kaikan Bldg. (Primary: On-site, Secondary: Online) |
On Constrained Rewrite Rules Representing Semantics Rules of LLVM IR Takumi Kato, Naoki Nishida, Masahiko Sakai (Nagoya Univ.) MSS2021-47 SS2021-34 |
A method to verify programs written in a simple C-like language via logically constrained term rewrite systems (LCTRS, f... [more] | MSS2021-47 SS2021-34 pp.89-94 |
| ET | 2021-12-11 10:30 |
Online | Online | Evaluation on Learning Support System for Electromagnetics Using Haptic Devices Konoki Tei, Toru Kano, Takako Akakura (TUS) ET2021-30 |
It has been suggested that incorporating force feedback into the learning of physics can easily lead to conceptual compr... [more] | ET2021-30 pp.7-12 |
| CPSY, DC, IPSJ-ARC [detail] | 2019-07-24 13:30 |
Hokkaido | Kitami Civic Hall | Proposal of Scalable Vector Instruction Set for Embedded RISC-V Processor Yoshiki Kimura, Tomoya Kikuchi, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.) CPSY2019-18 DC2019-18 |
Recently, the use of FPGA in the embedded field has increased. However, development using FPGA is high development costs... [more] | CPSY2019-18 DC2019-18 pp.21-26 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2018-07-31 14:30 |
Kumamoto | Kumamoto City International Center | Reduction of Indirect Addressing in Parallel-Program Generation for Improving Memory Efficiency on Vector Processor Yujiro Ishida, Masao Okita, Kenichi Hagihara, Fumihiko Ino (Osaka Univ.) CPSY2018-20 |
We discuss automatic code generation of a vectorizable program from a large-scale mathematical model. Indirect addressin... [more] | CPSY2018-20 pp.115-120 |
| ET | 2015-01-31 10:50 |
Tokyo | Mejiro Univ. | An estimation of test scores using features of note-taking during a blended learning Minoru Nakayama (Tokyo Tech.), Kouichi Mutsuura, Hiroh Yamamoto (Shinshu Univ.) ET2014-75 |
The prediction of learning performance using features of note-taking activity and learner's characteristics is determi... [more] |
ET2014-75 pp.17-22 |
| IPSJ-SLDM, CPSY, RECONF, VLD [detail] | 2014-01-29 10:25 |
Kanagawa | Hiyoshi Campus, Keio University | Implementation of MuCCRA-4: Dynamically Reconfigurable Processor Array Toru Katagiri, Hideharu Amano (Keio Univ.) VLD2013-122 CPSY2013-93 RECONF2013-76 |
Although Dynamically Reconfigurable Processor Arrays (DRPAs) are advantageous for embedded devices because of their high... [more] | VLD2013-122 CPSY2013-93 RECONF2013-76 pp.119-124 |
| SANE | 2012-01-26 13:00 |
Nagasaki | Nagasaki Prefectural Art Museum | Learning for ATC decision on priority of runway usage Masato Fujita (ENRI) SANE2011-141 |
With the miniaturization of aircraft and increasing air traffic demand, the workload of air traffic controllers is expec... [more] | SANE2011-141 pp.1-4 |
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