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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| DC | 2024-02-28 10:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | System design using DICE-based edge-triggered soft-error-tolerant D-FF Kazuteru Namba (Chiba Univ.)  DC2023-95 |
The recent miniaturization of VLSI has made the effects of radiation-induced soft errors more serious. From this, many... [more] |
DC2023-95 pp.7-10 |
| DC, CPSY, IPSJ-ARC [detail] | 2021-10-11 16:00 |
Online | Online | Edge triggered D Flip-Flop using complementarity of DICE Noriki Matsuura, Kazuteru Namba (Chiba Univ.) CPSY2021-15 DC2021-15 |
In recent years, the probability of soft errors has been increasing due to the miniaturization, high integration, and lo... [more] | CPSY2021-15 DC2021-15 pp.19-24 |
| EMD, R | 2021-02-12 13:35 |
Online | Online | Photograph observation of 12 parallel discharge arcs generated in the atmosphere by a reliable trigger gap switch Tomokatsu Aizawa (Tokyo Metropolitan College) R2020-34 EMD2020-25 |
This trigger gap switch has a switching circuit that combines multiple main electrodes and induced electric field genera... [more] | R2020-34 EMD2020-25 pp.1-6 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-17 10:55 |
Online | Online | DET Flip-Flops with SEU Detection Capability Using DICE and C-Element Xu Haijia, Kazuteru Namba (Chiba Univ.) VLD2020-14 ICD2020-34 DC2020-34 RECONF2020-33 |
Abstract A dual-edge-triggered flip-flop (DET-FF) composed of DICE latch (Dual Interlocked Storage Cell) and C-element ... [more] | VLD2020-14 ICD2020-34 DC2020-34 RECONF2020-33 pp.18-23 |
| EMD, R | 2018-02-16 15:00 |
Mie | Sumitomo Wiring Systems | Simultaneous Observation of Break Arcs from Two Directions by High Speed Cameras when a 48VDC/270A resistive circuit is interrupted Ryuichi Takano, Junya Sekikawa (Shizuoka Univ.) R2017-64 EMD2017-56 |
Break arcs are occurred by using an experimental equipment for breaking a 48VDC/270A high-current circuit and photograph... [more] | R2017-64 EMD2017-56 pp.19-23 |
| CAS, NLP | 2016-10-27 15:25 |
Tokyo | Self-Calibration and Trigger Circuit for 2-Step SAR TDC Takashi Ida, Yuki Ozawa, Richen Jiang, Haruo Kobayashi (Gunma Univ.), Ryoji Shiota (socionext) CAS2016-48 NLP2016-74 |
This paper presents a 2-step successive-approximation-register time-to-digital converter (SAR TDC) architecture with its... [more] | CAS2016-48 NLP2016-74 pp.55-60 |
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| SCE | 2015-08-05 10:25 |
Kanagawa | Yokohama National Univ. | Demonstration of a relaxation oscillator based on a superconducting Schmitt trigger inverter Takeshi Onomi (Fukuoka Inst. Tech.) SCE2015-17 |
A new relaxation oscillator using a superconducting Schmitt trigger inverter is proposed and tested. The superconducting... [more] | SCE2015-17 pp.53-57 |
| MBE | 2015-01-22 16:05 |
Kumamoto | Kumamoto University | Experimental analyses on linear response characteristics of mouse retinal ganglion cells Yuki Naruto, Tetsuya Yagi, Yuki Hayashida (Osaka Univ.) MBE2014-104 |
The vertebrate retina processes visual information contained in the outside world image by the multi-channel parallel ne... [more] | MBE2014-104 pp.53-58 |
| IE, ICD, VLD, IPSJ-SLDM [detail] | 2013-10-07 10:55 |
Aomori | Proposal of Double-clock and Dual-Edge-Triggered Flip-flops for Asynchronous Circuits Masashi Imai (Hirosaki Univ.), Tomohiro Yoneda (NII) VLD2013-47 ICD2013-71 IE2013-47 |
There are mainly two types of handshaking protocols in asynchronous circuit design; 2-phase handshaking protocol and 4-p... [more] | VLD2013-47 ICD2013-71 IE2013-47 pp.7-12 |
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| DC | 2012-02-13 10:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Design of Dual Edge Triggered Flip-Flops and Application to Signal Delay Detection Yoshihiro Ohkawa, Yukiya Miura (TMU) DC2011-76 |
Conventional edge triggered flip-flops sample a data signal synchronizing with single clock edge. If a noise signal occu... [more] | DC2011-76 pp.1-6 |
| DC | 2011-02-14 15:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Dual Edge Triggered Flip-Flops for Blocking Noise Pulses on Data Signal Lines Yukiya Miura (Tokyo Metropolitan Univ.) DC2010-68 |
This paper proposes a new flip-flop design, a dual edge triggered flip-flops, for dependable design taking into account ... [more] | DC2010-68 pp.57-62 |
| ICD, ITE-IST | 2007-07-27 08:30 |
Hyogo | A Study of Clock and Data Recovery Circuits with Wide Band VCO Tomoyuki Tanaka (Osaka Univ./Synthesis), Tsukasa Ida, Guechol Kim, Toshimasa Matsuoka, Kenji Taniguchi (Osaka Univ.) ICD2007-54 |
We proposed wide band Clock and Data Recovery circuits (CDR) with VCO-control-voltage recovery block which avoid the loo... [more] | ICD2007-54 pp.101-105 |
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