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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| SDM, ICD, ITE-IST [detail] | 2023-08-01 16:35 |
Hokkaido | Hokkaido Univ. Multimedia Education Bldg. 3F (Primary: On-site, Secondary: Online) |
Analysis of back bias effects and history phenomena in cryo 200nm SOIMOSFETs Ryusei Ri, Takayuki Mori (KIT), Hiroshi Oka, Takahiro Mori (AIST), Jiro Ida (KIT)  SDM2023-42 ICD2023-21 |
In this paper, we report the results of our ongoing analysis of a peculiar phenomenon in 200 nm SOI MOSFETs, which occur... [more] | SDM2023-42 ICD2023-21 pp.32-35 |
| SDM | 2022-11-11 11:30 |
Online | Online | Modeling of Super Steep Subthreshold Slope "PN Body Tied SOI-FET" by using Neural Network Nakata Kengo, Mori Takayuki, Ida Jiro (Kanazawa Inst. of Tech.) SDM2022-73 |
In this study, we examined how PN-Body Tied (PNBT) Silicon On Insulator (SOI)-FETs, a novel device structure with steep ... [more] | SDM2022-73 pp.44-48 |
| ICD, SDM, ITE-IST [detail] | 2022-08-08 14:15 |
Online | Evaluation of Steep Subthreshold Slope Device "Dual-gate type PN-body Tied SOI-FET" for Ultra-low Voltage Operation Haruki Yonezaki, Jiro Ida, Takayuki Mori (KIT), Koichiro Ishibashi (UEC) SDM2022-38 ICD2022-6 |
In this study, we report the first prototype results of a Steep SS "Dual-Gate (DG) PN-Body Tied (PNBT) SOI-FET" for extr... [more] | SDM2022-38 ICD2022-6 pp.17-20 |
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| ICD, SDM, ITE-IST [detail] | 2020-08-07 11:00 |
Online | Online | CMOS Inverter Transfer Characteristics on Steep SS “PN-Body Tied SOI-FET” Shota Ishiguro, Jiro Ida, Takayuki Mori (KIT), Koichiro Ishibashi (UEC) SDM2020-8 ICD2020-8 |
In this study, we report the CMOS Inverter Transfer Characteristics on Steep SS “PN-Body Tied SOI-FET” proposed in our l... [more] | SDM2020-8 ICD2020-8 pp.37-40 |
| MW (2nd) |
2020-05-13 - 2020-05-15 |
Overseas | CU, Bangkok, Thailand (Postponed) |
RF Measurement of Steep Subthreshold Slope "PN-Body Tied SOI FET" Mitsuhiro Yuizono, Jiro Ida, Takayuki Mori (Kanazawa Inst of Tech) |
RF measured data of super steep subthreshold slope "PN-Body Tied (PNBT) SOI-FET" was obtained for the first time. The te... [more] | |
| SDM, ICD, ITE-IST [detail] | 2019-08-09 14:10 |
Hokkaido | Hokkaido Univ., Graduate School /Faculty of Information Science and | Effect of Vsub and Positive Charge in Buried Oxide on Super Steep SS “PN Body-Tied SOI-FET” Wataru Yabuki, Jiro Ida, Takayuki Mori (KIT), Koichiro Ishibashi (UEC), Yasuo Arai (KEK) SDM2019-51 ICD2019-16 |
In this study, We report the effect of the substrate bias (Vsub) and the positive charge (Qox) in the buried oxide (BOX)... [more] | SDM2019-51 ICD2019-16 pp.89-93 |
| SDM | 2018-11-09 15:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Characteristics and Ultralow Voltage Rectification Experiment on MOS Diode connection using Super Steep SS PN-Body Tied SOI-FET Shun Momose, Jiro Ida, Takuya Yamada, Takayuki Mori, Kenji Itoh (KIT), Koichiro Ishibashi (UEC), Yasuo Arai (KEK) SDM2018-76 |
In order to utilize the Radio Frequency (RF) signal power existing in the living environment, a RF rectifier that realiz... [more] | SDM2018-76 pp.59-64 |
| SDM, ICD, ITE-IST [detail] | 2018-08-07 14:25 |
Hokkaido | Hokkaido Univ., Graduate School of IST M Bldg., M151 | Experiment of Ultralow Voltage Rectification by Super Steep SS "PN-Body Tied SOI-FET" Shun Momose, Jiro Ida, Takuya Yamada, Takayuki Mori, Kenji Itoh (KIT), Koichiro Ishibashi (UEC), Yasuo Arai (KEK) SDM2018-31 ICD2018-18 |
In order to construct a rectifier that function with µW power, it is necessary to develop a new diode technology. The co... [more] | SDM2018-31 ICD2018-18 pp.31-34 |
| SDM, ICD, ITE-IST [detail] | 2018-08-08 09:45 |
Hokkaido | Hokkaido Univ., Graduate School of IST M Bldg., M151 | Understanding Temperature Effect on Subthreshold Slope Variability in Bulk and SOTB MOSFETs Shuang Gao, Tomoko Mizutani, Kiyoshi Takeuchi, Masaharu Kobayashi, Toshiro Hiramoto (Univ. Tokyo) SDM2018-37 ICD2018-24 |
We present a new finding that subthreshold slope (SS) variability is reduced at high temperature in both bulk and silico... [more] | SDM2018-37 ICD2018-24 pp.65-70 |
| SDM, ICD, ITE-IST [detail] | 2017-08-02 11:35 |
Hokkaido | Hokkaido-Univ. Multimedia Education Bldg. | Gate Controlled Diode Characteristics of Super Steep Subthreshold slope PN-Body Tied SOI-FET for high Efficiency RF Energy Harvesting Shun Momose, Jiro Ida, Takayuki Mori, Takahiro Yoshida, Junpei Iwata, Takashi Horii, Takahiro Furuta, Takuya Yamada, Daichi Takamatsu, Kenji Itoh (KIT), Koichiro Ishibashi (UEC), Yasuo Arai (KEK) SDM2017-45 ICD2017-33 |
The gate controlled diode characteristics with our newly super steep subthreshold slope (SS) “PN-Bode Tied SOI FET” was ... [more] | SDM2017-45 ICD2017-33 pp.109-114 |
| SDM | 2016-06-29 10:40 |
Tokyo | Campus Innovation Center Tokyo | [Invited Lecture]
Design of SOI-FETs for Steep Slope Switching using Negative Capacitance in Ferroelectric Gate Insulators Hiroyuki Ota, Shinji Migita, Junichi Hattori, Koichi Fukuda (AIST), Akira Toriumi (The Univ. of Tokyo) SDM2016-34 |
This paper discusses a design of fully depleted silicon-on-insulator field-effect transistors with ferroelectric gate in... [more] | SDM2016-34 pp.9-13 |
| SDM | 2016-01-28 15:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Super Steep Subthreshold Slope PN-Body Tied SOI FET with Ultra Low Drain Voltage Jiro Ida (Kanazawa Institute of Technology) SDM2015-127 |
We have proposed the new type super steep subthreshold slope (SS) device of the PN-body tied SOI FET. The N region is in... [more] | SDM2015-127 pp.31-34 |
| SDM, ICD | 2013-08-01 09:00 |
Ishikawa | Kanazawa University | Analysis of Steep Subthreshold Slope Characteristics in SOI MOSFET Takayuki Mori, Jiro Ida (Kanazawa Inst. of Tech.) SDM2013-65 ICD2013-47 |
We have found out that the steep Subthreshold Slope (SS) appears in the Floating-Body (FB) and the Body-Tied (BT) SOI MO... [more] | SDM2013-65 ICD2013-47 pp.1-6 |
| SDM, ED (Workshop) |
2012-06-27 14:15 |
Okinawa | Okinawa Seinen-kaikan | Control Effect of New Optimized Structure of Planar Thin Floating Gate (FG) NAND Flash to Fringing Field Do-Bin Kim, Yoon Kim, Se Hwan Park, Wandong Kim, Joo Yun Seo, Seung-Hyun Kim, Byung-Gook Park (Seoul National Univ.) |
As cell size of floating gate (FG) type NAND flash memory shrinks, formation of structure which has control gate wrappin... [more] | |
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