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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 13 of 13  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2022-11-11
11:30
Online Online Modeling of Super Steep Subthreshold Slope "PN Body Tied SOI-FET" by using Neural Network
Nakata Kengo, Mori Takayuki, Ida Jiro (Kanazawa Inst. of Tech.) SDM2022-73
In this study, we examined how PN-Body Tied (PNBT) Silicon On Insulator (SOI)-FETs, a novel device structure with steep ... [more] SDM2022-73
pp.44-48
ICD, SDM, ITE-IST [detail] 2022-08-08
14:15
Online   Evaluation of Steep Subthreshold Slope Device "Dual-gate type PN-body Tied SOI-FET" for Ultra-low Voltage Operation
Haruki Yonezaki, Jiro Ida, Takayuki Mori (KIT), Koichiro Ishibashi (UEC) SDM2022-38 ICD2022-6
In this study, we report the first prototype results of a Steep SS "Dual-Gate (DG) PN-Body Tied (PNBT) SOI-FET" for extr... [more] SDM2022-38 ICD2022-6
pp.17-20
ICD, SDM, ITE-IST [detail] 2020-08-07
11:00
Online Online CMOS Inverter Transfer Characteristics on Steep SS “PN-Body Tied SOI-FET”
Shota Ishiguro, Jiro Ida, Takayuki Mori (KIT), Koichiro Ishibashi (UEC) SDM2020-8 ICD2020-8
In this study, we report the CMOS Inverter Transfer Characteristics on Steep SS “PN-Body Tied SOI-FET” proposed in our l... [more] SDM2020-8 ICD2020-8
pp.37-40
MW
(2nd)
2020-05-13
- 2020-05-15
Overseas CU, Bangkok, Thailand
(Postponed)
RF Measurement of Steep Subthreshold Slope "PN-Body Tied SOI FET"
Mitsuhiro Yuizono, Jiro Ida, Takayuki Mori (Kanazawa Inst of Tech)
RF measured data of super steep subthreshold slope "PN-Body Tied (PNBT) SOI-FET" was obtained for the first time. The te... [more]
SDM, ICD, ITE-IST [detail] 2019-08-09
14:10
Hokkaido Hokkaido Univ., Graduate School /Faculty of Information Science and Effect of Vsub and Positive Charge in Buried Oxide on Super Steep SS “PN Body-Tied SOI-FET”
Wataru Yabuki, Jiro Ida, Takayuki Mori (KIT), Koichiro Ishibashi (UEC), Yasuo Arai (KEK) SDM2019-51 ICD2019-16
In this study, We report the effect of the substrate bias (Vsub) and the positive charge (Qox) in the buried oxide (BOX)... [more] SDM2019-51 ICD2019-16
pp.89-93
SDM 2019-01-29
11:00
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] The Relationship between Polarization Switching and Subthreshold Behavior in HfO2-based Ferroelectric and Anti-ferroelectric FET: An Experimental Study
Chengji Jin, Kyungmin Jang, Takuya Saraya, Toshiro Hiramoto, Masaharu Kobayashi (Univ. of Tokyo) SDM2018-84
We have experimentally studied and revealed the direct relationship between polarization switching and subthreshold char... [more] SDM2018-84
pp.13-16
MW
(2nd)
2018-06-27
- 2018-06-29
Overseas KMITL, Bangkok, Thailand Rectification of Small Voltage Signal by Super Steep Subthreshold Slope "PN-Body Tied SOI FET" for RF Energy Harvesting
Takuya Yamada, Jiro Ida, Takayuki Mori, Shun Momose, Yasunori Tsuchiya, Kenji Itoh (KIT), Koichiro Ishibashi (UEC)
Rectification of the small voltage signal was experimentally confirmed, for the first time, by our new device of the sup... [more]
MW
(2nd)
2017-06-14
- 2017-06-16
Overseas KMUTT, Bangkok, Thailand Possibility of Super Steep Subthreshold Slope Devices for High Efficiency RF Energy Harvesting of Ultra Low Power Input
Jiro Ida, Kenji Itoh (KIT), Koichiro Ishibashi (UEC)
The new diode technologies for RF energy harvesting of the ultralow power input was discussed. The limit of the conventi... [more]
ICD, SDM, ITE-IST [detail] 2016-08-03
15:30
Osaka Central Electric Club Performance Enhancement of Tunnel FET by Negative Capacitance
Masaharu Kobayashi, Kyungmin Jang, Nozomu Ueyama, Toshiro Hiramoto (Univ. of Tokyo) SDM2016-68 ICD2016-36
IoT devices in a sensor network require a new energy-efficient transistor which operates at ultralow voltage and power e... [more] SDM2016-68 ICD2016-36
pp.127-130
SDM 2016-06-29
10:40
Tokyo Campus Innovation Center Tokyo [Invited Lecture] Design of SOI-FETs for Steep Slope Switching using Negative Capacitance in Ferroelectric Gate Insulators
Hiroyuki Ota, Shinji Migita, Junichi Hattori, Koichi Fukuda (AIST), Akira Toriumi (The Univ. of Tokyo) SDM2016-34
This paper discusses a design of fully depleted silicon-on-insulator field-effect transistors with ferroelectric gate in... [more] SDM2016-34
pp.9-13
SDM 2016-01-28
15:50
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Super Steep Subthreshold Slope PN-Body Tied SOI FET with Ultra Low Drain Voltage
Jiro Ida (Kanazawa Institute of Technology) SDM2015-127
We have proposed the new type super steep subthreshold slope (SS) device of the PN-body tied SOI FET. The N region is in... [more] SDM2015-127
pp.31-34
SDM 2015-01-27
16:45
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Experimental Realization of Complementary p- and n- Tunnel FinFETs with Subthreshold Slopes of Less than 60 mV/decade and Very Low (pA/um) Off-Current on a Si CMOS Platform
Yukinori Morita, Takahiro Mori, Koichi Fukuda, Wataru Mizubayashi, Shinji Migita, Takashi Matsukawa, Kazuhiko Endo, Shinichi O'uchi, Yongxun Liu, Meishoku Masahara, Hiroyuki Ota (AIST) SDM2014-146
Complementary (p- and n-type) tunnel FinFETs operating with subthreshold slopes (SSs) of less than 60 mV/decade and very... [more] SDM2014-146
pp.45-48
SDM, ICD 2013-08-01
09:00
Ishikawa Kanazawa University Analysis of Steep Subthreshold Slope Characteristics in SOI MOSFET
Takayuki Mori, Jiro Ida (Kanazawa Inst. of Tech.) SDM2013-65 ICD2013-47
We have found out that the steep Subthreshold Slope (SS) appears in the Floating-Body (FB) and the Body-Tied (BT) SOI MO... [more] SDM2013-65 ICD2013-47
pp.1-6
 Results 1 - 13 of 13  /   
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