IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 4 of 4  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2011-09-27
13:20
Aichi Nagoya Univ. Design and Implementation of Adaptive Viterbi Decoder using Dynamic Reconfigurable System STP Engine
Yuken Kishimoto, Takao Toi, Takaaki Miyajima, Hideharu Amano (Keio Univ.) RECONF2011-38
Implementing Viterbi Algorithm that is the decoding method of Convolutional code on hard-wired logic, in order to variou... [more] RECONF2011-38
pp.93-98
SR 2009-07-29
09:50
Tokyo Tokyo institute of technology [Technology Exhibit] A Flexible Wireless System Supporting for a Wide Variety of Wireless Systems
Hiroyuki Shiba, Yo Yamaguchi, Kazunori Akabane, Takayuki Yamada, Kazuhiro Uehara (NTT) SR2009-23
A great variety of wireless systems are currently being used to provide diverse and sophisticated information and commun... [more] SR2009-23
pp.7-12
SIS 2008-12-05
11:00
Osaka Kansai Univ. Video transmission core by using FPGA
Kentaro Hanai, Ryosuke Kurogi, Hiroshi Kotaki, Kazuki Sato, Rika Sato, Kenji Kudo (Tokyo Univ. of Agriculture and Tech.), Soichiro Matsushita (Tokyo Univ. of Tech.), Masashi Watanabe (Tokyo Systems Laboratories,inc.), Hakaru Tamukoh, Masatoshi Sekine (Tokyo Univ. of Agriculture and Tech.)
While there are various kinds of video codecs, an encoder and a decoder always have to be pair. Therefore, we proposed a... [more] SIS2008-59
pp.97-102
RCS, MoNA, WBS, SR, MW
(Joint)
2007-03-09
09:20
Kanagawa YRP Adaptive Reduction of Power Consumption of Viterbi Decoder using Reconfigurable Processor
Yuken Kishimoto, Shinichiro Haruyama, Masao Nakagawa (Keio Univ.) SR2006-90
In past time, the research that Viterbi decoder is achieved on VLSI was studied, but it was unique research that Viterbi... [more] SR2006-90
pp.9-13
 Results 1 - 4 of 4  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan