IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 21  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
SCE 2021-08-06
15:00
Online Online High-Throughput Low-Latency Single-Flux-Quantum Circuits with Feedback Path
Ryota Kashima, Ikki Nagaoka, Tomoki Nakano, Masamitsu Tanaka, Taro Yamashita, Akira Fujimaki (Nagoya Univ.) SCE2021-5
We have introduced bit-parallel processing into high-speed, low-power microprocessors based on single-flux-quantum circu... [more] SCE2021-5
pp.19-24
SCE 2021-01-19
13:05
Online Online [Invited Talk] Design of serializer/deserializer circuits for adiabatic quantum-flux-parametron circuits using delay-line clocking
Yuki Hironaka, Taiki Yamae, Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2020-17
An adiabatic quantum-flux-parametron (AQFP) circuit is an extremely low-power Josephson logic family. A novel clocking s... [more] SCE2020-17
pp.1-6
SCE 2021-01-19
15:25
Online Online Investigation of Operating Frequency of Low-Power Single-Flux-Quantum Circuits
Manami Kuniyoshi, Ken Murase, Ikki Nagaoka, Masamitsu Tanaka, Taro Yamashita, Akira Fujimaki (Nagoya Univ.) SCE2020-22
To reduce the power consumption of single-flux-quantum circuits, it is an effective method to reduce the critical curren... [more] SCE2020-22
pp.30-35
SCE 2020-11-25
14:20
Online Online Design and bit-error-late evaluation of a Josephson latching driver using 10-kA/cm2 Nb process
Yuki Hironaka, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2020-8
We have been developing Josephson-CMOS hybrid memory, which is a combination of CMOS memory and Josephson logic circuits... [more] SCE2020-8
pp.1-6
SCE 2019-10-09
16:15
Miyagi   Design of High Timing resolution Time-to-Digital Convertor for Time-Resolving Photon Detection System using SNSPD
Hiroaki Myoren, Ryotaro Kamiya, Kota Aita, Masato Naruse, Tohru Taino (Saitama Univ.), Lin Kang, Jian Chen, Peiheng Wu (Nanjing Univ.) SCE2019-26
Superconducting nanowire single photon detectors (SNSPDs) , those have a low dark count rate characteristics, fast and l... [more] SCE2019-26
pp.23-26
SCE 2019-08-09
14:20
Ibaraki National Institute of Advanced Industrial Science and Technology Design and Operation of RSFQ Distributed Output Amplifier Equipped with double-stack SQUIDs
Komei Higuchi, Hiroshi Shimada, Yoshinao Mizugaki (UEC Tokyo) SCE2019-16
Recently, many groups have been proposed Rapid Single-Flux-Quantum (RSFQ) output amplifiers which are designed to connec... [more] SCE2019-16
pp.43-48
SCE 2019-08-09
15:50
Ibaraki National Institute of Advanced Industrial Science and Technology Study of SFQ microwave switch with controllable amplitude for quantum bits
Shiori Michibayashi, Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Nat. Univ.) SCE2019-19
Qubits with Josephson Junctions are controlled by microwave pulses of suitable duration time and amplitude. Control of e... [more] SCE2019-19
pp.61-65
SCE 2016-08-09
13:40
Saitama Saitama Univ. (Omiya sonic city) Single-flux-quantum readout and digital signal processing of serially-connected superconducting stripline detection array
Ryosuke Naito, Kyohei Kamiya, Misaki Kozaka, Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.) SCE2016-21
We have been developing one-million-pixel imaging sensors, integrating superconducting strip line detectors (SSLDs) and ... [more] SCE2016-21
pp.45-50
SCE 2016-01-21
09:30
Tokyo   Proposal and verification of bipolar DFQ amplifier
Tomoki Watanabe (UEC), Hiroshi Shimada, Yoshinao Mizugaki (UEC/JST) SCE2015-36
To realize AC voltage standard, researches of frequency modulation (FM) type SFQ-D/A converters have been conducted. We ... [more] SCE2015-36
pp.1-6
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-03
11:15
Nagasaki Nagasaki Kinro Fukushi Kaikan Logic Design of A Single-Flux-Quantum Microprocessor
Koki Ishida, Tomonori Tsuhata (Kyushu Univ.), Masamitsu Tanaka (Nagoya Univ.), Takatsugu Ono, Koji Inoue (Kyushu Univ.) CPSY2015-73
CMOS microprocessors have been facing a limitation for clock speed improvement because of increasing
computing power. U... [more]
CPSY2015-73
pp.69-74
SCE 2014-07-23
13:50
Tokyo Kikai-Shinko-Kaikan Bldg. Prototypes of Single-Chip Voltage Waveform Generators Based on SFQ Pulse-Frequency Modulation
Yoshinao Mizugaki, Keisuke Kuroiwa, Yusuke Sato, Yoshitaka Takahashi, Hiroshi Shimada (Univ. of Electro-Comm.), Masaaki Maezawa (AIST) SCE2014-31
We have been developing single-chip voltage waveform generators based on single-flux-quantum (SFQ) pulse-frequency modul... [more] SCE2014-31
pp.43-46
SCE 2013-07-22
11:40
Tokyo Kikaishinkou-kaikan Bldg. Proposal and demonstration of noise reduction method by modifying shunt resistors in RSFQ circuits.
Yuma Kita, Hiromi Matsuoka (Nagoya Univ.), Shigeyuki Miyajima (Osaka Prefecture Univ.), Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.) SCE2013-14
Abstract The major noise sources in rapid single-flux-quantum (RSFQ) circuits are shunt resistors which are connected in... [more] SCE2013-14
pp.23-28
SCE 2013-01-24
11:20
Okayama Okayama Univ. [Invited Talk] Analysis of Interference for Low-Voltage-Driven SFQ Circuits
Takumi Takinami, Masato Ito, Atsushi Kitayama, Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.) SCE2012-30
We have analyzed the interference for low-voltage-driven SFQ circuits used by measurement and simulation. We study low-v... [more] SCE2012-30
pp.31-35
VLD 2012-03-07
10:45
Oita B-con Plaza Equivalence Checking Method of Timed Logic Formulae for Design Verification of Single-Flux Quantum Circuits
Takahiro Kawaguchi (Nagoya Univ.), Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) VLD2011-135
This paper proposes an equivalence checking method of timed logic formulae for reducing number of
states in verificatio... [more]
VLD2011-135
pp.91-96
SCE 2011-07-13
16:05
Tokyo Kikai-Shinko-Kaikan Bldg. Nano-watt demonstration of single-flux-quantum circuits
Atsushi Kitayama, Masato Ito, Tomohito Kouketsu, Tetsuya Kusumoto, Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.) SCE2011-10
We have demonstrated rapid-single-flux-quantum (RSFQ) circuits with reduced power consumptions by lowering bias voltages... [more] SCE2011-10
pp.53-58
SCE 2010-07-22
13:40
Tokyo Kikai-Shinko-Kaikan Bldg. Demonstration of a 4x4 SFQ switch fabricated with the ISTEC 10-kA/cm2 Nb Advanced process 2
Masato Ito, Irina Kataeva, Masakazu Okada, Tomohito Kouketsu, Masamitsu Tanaka, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ.) SCE2010-21
We have evaluated the performance of the 4×4 SFQ switch which was designed and fabricated using ISTEC Advanced process ... [more] SCE2010-21
pp.41-46
ICD, IPSJ-ARC, IPSJ-EMB 2010-01-29
13:25
Tokyo T.B.D. Developing an Architecture for a Single-Flux Quantum Based Reconfigurable Accelerator
Farhad Mehdipour (Kyushu Univ.), Hiroaki Honda (ISIT), Hiroshi Kataoka, Koji Inoue, Kazuaki Murakami (Kyushu Univ.) ICD2009-111
As a solution to gain high performance computation, a large scale reconfigurable data-path (LSRDP) processor is
introdu... [more]
ICD2009-111
pp.99-104
SCE 2008-10-30
14:50
Ibaraki AIST Demonstration of a Single-Flux-Quantum Floating-Point Divider for the Reconfigurable Data-path
Masamitsu Tanaka, Koji Obata, Kazuyoshi Takagi, Naofumi Takagi (Nagoya Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2008-27
We report implementation and experimental results of a single-flux-quantum (SFQ) floating-point serial divider developed... [more] SCE2008-27
pp.29-34
SCE 2007-01-26
11:20
Tokyo SRL Development of pipelined bit-serial single-flux-quantum microprocessors
Masamitsu Tanaka (Nagoya Univ.), Yuki Yamanashi (Yokohama National Univ.), Naoki Irie (Nagoya Univ.), Heejoung Park (Yokohama National Univ.), Shingo Iwasaki (Nagoya Univ.), Kazuhiro Taketomi (Yokohama National Univ.), Akira Fujimaki (Nagoya Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.), Hirotaka Terai (NICT), Shinichi Yorozu (NEC)
A pipelined single-flux-quantum microprocessor, called CORE1$\beta$ has been designed and its perfect operations have be... [more] SCE2006-33
pp.19-24
SCE 2007-01-26
14:45
Tokyo SRL [Invited Talk] Fabrication Process for Nb-based Single Flux Quantum Circuits
Mutsuo Hidaka, Shuichi Nagasawa, Kenji Hinode, Tetsuro Satoh (SRL)
Current status and future prospect of Nb based single-flux-quantum (SFQ) circuit fabrication process in Superconductivit... [more] SCE2006-37
pp.41-44
 Results 1 - 20 of 21  /  [Next]  
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan