Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] |
2017-01-24 17:20 |
Kanagawa |
Hiyoshi Campus, Keio Univ. |
A New Residue Addition Algorithm Using Signed-Digit Numbers and Its Application to RSA Encryption Kazumasa Ishikawa, Yuuki Tanaka, Shugang Wei (Gunma Univ.) VLD2016-92 CPSY2016-128 RECONF2016-73 |
In this paper, we presented a new residue addition algorithm using Signed-Digit (SD) numbers for the applications such a... [more] |
VLD2016-92 CPSY2016-128 RECONF2016-73 pp.147-152 |
RECONF, CPSY, VLD, IPSJ-SLDM [detail] |
2015-01-30 10:30 |
Kanagawa |
Hiyoshi Campus, Keio University |
Error detection using residue signed-digit number arithmetic for arithmetic circuits Yoshitomo Nema, Yuuki Tanaka, Kazuhiro Motegi, Shugang Wei (Gunma Univ) VLD2014-136 CPSY2014-145 RECONF2014-69 |
For error detection of multiply-accumulate operation, a residue error detector can be considered for the VLSI implementa... [more] |
VLD2014-136 CPSY2014-145 RECONF2014-69 pp.151-156 |
CPSY, VLD, RECONF, IPSJ-SLDM [detail] |
2013-01-16 14:10 |
Kanagawa |
|
Optimal Design and Performance Evaluation of Residue Arithmetic Circuits with a Binary Coding of Signed-Digit Number Takuya Kobayashi, Kazuhiro Motegi, Shugang Wei (Gunma Univ.) VLD2012-114 CPSY2012-63 RECONF2012-68 |
Signed-Digit (SD) has a redundancy by using \{-1,0,1\}.
By applying the redundant binary representation to arithmetic c... [more] |
VLD2012-114 CPSY2012-63 RECONF2012-68 pp.39-44 |
CPSY, VLD, RECONF, IPSJ-SLDM [detail] |
2013-01-16 14:35 |
Kanagawa |
|
Design and Performance Evaluation of RSA Encryption Processor Using Signed-Digit Number Arithmetic Junichi Asaoka, Yuuki Tanaka, Shugang Wei (Gunma Univ.) VLD2012-115 CPSY2012-64 RECONF2012-69 |
RSA encryption processing spends a lot of time on modular exponentiation of long word length, therefore the speed of the... [more] |
VLD2012-115 CPSY2012-64 RECONF2012-69 pp.45-50 |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-26 15:55 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
Residue-Binary Conversion Using Signed-Digit Number Arithmetic Changjun Jiang, Shugang Wei (Gunma Univ.) VLD2009-80 CPSY2009-62 RECONF2009-65 |
By introducing a signed-digit(SD) number arithmetic into a residue number system (RNS), arithmetic operations can be per... [more] |
VLD2009-80 CPSY2009-62 RECONF2009-65 pp.71-76 |
IPSJ-SLDM, VLD, CPSY, RECONF [detail] |
2010-01-26 16:20 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
Implementation Method and Performance Evaluation of Residue Arithmetic Circuits Using Signed-Digit Number Representation Mingda Zhang, Shugang Wei (Gunma Univ.) VLD2009-81 CPSY2009-63 RECONF2009-66 |
[more] |
VLD2009-81 CPSY2009-63 RECONF2009-66 pp.77-82 |
CPSY, VLD, IPSJ-SLDM |
2005-01-26 17:20 |
Kanagawa |
|
Architecture of RNS to Mixed-Radix Number Converter Using Signed-Digit Number Arithmetic Yumi Ogawa, Shuangching Chen, Shugang Wei (Gunma Univ.) |
By introducing a signed-digit(SD) number arithmetic into a residue number system (RNS), arithmetic operations can be per... [more] |
VLD2004-123 CPSY2004-89 pp.79-84 |