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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2015-10-29
16:00
Miyagi Niche, Tohoku Univ. Electrical Properties of MOSFETs Introducing Atomically Flat Gate Insulator/Silicon Interface
Tetsuya Goto, Rihito Kuroda, Tomoyuki Suwa, Akinobu Teramoto, Toshiki Obara, Daiki Kimoto, Shigetoshi Sugawa (Tohoku Univ.), Yutaka Kamata, Yuki Kumagai, Katsuhiko Shibusawa (LAPIS Semi. Miyagi) SDM2015-74
Atomically flattening technology was introduced to the widely-used complementary metal oxide silicon (CMOS) process empl... [more] SDM2015-74
pp.17-22
SDM 2014-10-16
14:50
Miyagi Niche, Tohoku Univ. Introduction of Atomically Flattening of Silicon Surface in Shallow Trench Isolation Process Technology
Tetsuya Goto, Rihito Kuroda, Naoya Akagawa, Tomoyuki Suwa, Akinobu Teramoto, Xiang Li, Toshiki Obara, Daiki Kimoto, Shigetoshi Sugawa, Tadahiro Ohmi (Tohoku Univ.), Yuki Kumagai, Yutaka Kamata, Katsuhiko Shibusawa (LAPIS Semiconductor Miyagi) SDM2014-85
Atomically flattening technology was introduced to the widely-used complementary metal oxide silicon (CMOS) process empl... [more] SDM2014-85
pp.7-12
IE, ICD, VLD, IPSJ-SLDM [detail] 2013-10-08
11:50
Aomori   A 9-bit, 20MS/s SAR ADC with A Design Strategy by Synthesizing Consideration of Layout-Dependent Effects
Gong Chen, Mingyu Li, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang (Design Algorithm Lab) VLD2013-60 ICD2013-84 IE2013-60
In nano-scale manufacturing processes of integrated circuits,
a impact of layout-dependent effects (LDEs)
to circuit p... [more]
VLD2013-60 ICD2013-84 IE2013-60
pp.77-82
 Results 1 - 3 of 3  /   
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