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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 52  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
DC, CPSY, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2024-03-22
09:50
Nagasaki Ikinoshima Hall
(Primary: On-site, Secondary: Online)
Integration of Vector Extension and Simultaneous Multithreading for a RISC-V Processor
Hidetaro Tanaka, Shogo Takata, Hironori Nakajo (TUAT) CPSY2023-43 DC2023-109
In vector architectures, the potential for parallel execution lies in the chaining of instruction sequences. However, a ... [more] CPSY2023-43 DC2023-109
pp.29-34
RECONF 2023-09-14
16:20
Tokyo Tokyo University of Agriculture and Technology Koganei campus
(Primary: On-site, Secondary: Online)
Integrating RISC-V Vector Extension and SMT for Embedded AI Workloads
Hidetaro Tanaka, Shogo Takata, Hironori Nakajo (TUAT) RECONF2023-22
In this paper, we plan to implement a processor that accelerates AI workloads by integrating RISC-V vector extensions th... [more] RECONF2023-22
pp.13-14
KBSE 2023-03-17
14:35
Hiroshima JMS ASTERPLAZA
(Primary: On-site, Secondary: Online)
Development of Co-Analysis Support Tool by Linking Simulink and SMT Solver
Engielista Anak Norman, Yoshikazu Ueda (Ibaraki Univ.) KBSE2022-67
In order to target various models in co-analysis, it is necessary to be able to select the SMT solver according to the c... [more] KBSE2022-67
pp.79-84
HWS, VLD 2023-03-02
14:40
Okinawa
(Primary: On-site, Secondary: Online)
[Memorial Lecture] A method for synthesizing quantum circuits satisfying NNA constraints using SMT solvers
Kyehei Seino, Shigeru Yamashita (Ritsumeikan University) VLD2022-94 HWS2022-65
It is natural to assume that we can perform quantum operations be-
tween only two adjacent physical qubits (quantum bit... [more]
VLD2022-94 HWS2022-65
p.112
IA, ICSS 2022-06-24
11:25
Nagasaki Univ. of Nagasaki
(Primary: On-site, Secondary: Online)
An Experimental Study on Name Resolution History Basis Abnormal Detection and Blocking Using SDN and DNS RPZ
Hikaru Ichise, Yong Jin (Tokyo Tech), Katsuyoshi Iida (Hokkaido Univ) IA2022-13 ICSS2022-13
Most of the network applications communicate to the servers with the destination IP addresses obtained by prior the
na... [more]
IA2022-13 ICSS2022-13
pp.71-75
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2022-03-11
14:30
Online Online Highly Efficient Mixed Criticality System Using Fluid Scheduling
Kosuke Yashima, Nobuyuki Yamasaki (Keio Univ.) CPSY2021-64 DC2021-98
In recent real-time systems, it is necessary to deal with tasks whose execution time varies depending on the situation.
... [more]
CPSY2021-64 DC2021-98
pp.115-119
KBSE 2021-03-06
11:05
Online Online Examining programming languages that enable automatic scoring
Yoshinori Tanabe (Tsurumi Univ.), Masami Hagiya (Univ. of Tokyo) KBSE2020-42
Automatic scoring is a desirable feature when conducting
programming examinations that many people take.
By preparing ... [more]
KBSE2020-42
pp.48-53
MSS, SS 2021-01-27
15:00
Online Online Speeding up combinatorial optimization solver CombSQL+ by introducing Pseudo-Boolean constraints
Junichiro Kishi, Masahiko Sakai, Naoki Nishida, Kenji Hashimoto (Nagoya univ.) MSS2020-40 SS2020-25
The authors have proposed a solver CombSQL+ for combinatorial optimization problems (COPs) described in extended SQL lan... [more] MSS2020-40 SS2020-25
pp.66-71
CPSY, DC, IPSJ-ARC [detail] 2020-07-31
17:00
Online Online
Daichi Minamide, Tatsuhiro Tsuchiya (Osaka Univ.) CPSY2020-14 DC2020-14
(To be available after the conference date) [more] CPSY2020-14 DC2020-14
pp.87-92
NS, NWS
(Joint)
2020-01-23
14:55
Okinawa   [Encouragement Talk] Performance Evaluation of Time-Schedule Calculation Methods for Low-Delay Streams
Makoto Kubomi, Ryuma Matsushita, Daisuke Takita, Yoshifumi Hotta (Mitsubishi Electric) NS2019-164
In industrial networks, Ethernet is known as the prevailing protocol due to its high capacity and cost effectiveness. Th... [more] NS2019-164
pp.19-23
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-15
16:10
Ehime Ehime Prefecture Gender Equality Center Low Latency Interrupt Handling Scheme By Using Interrupt Wake-Up Mechanism
Ryo Wada, Nobuyuki Yamasaki (Keio Univ.) CPSY2019-50
Recently, embedded real-time systems used in spacecraft and automobiles have become increasingly complex and are require... [more] CPSY2019-50
pp.71-76
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2019-03-17
15:50
Kagoshima Nishinoomote City Hall (Tanega-shima) Real-Time Voltage and Frequency Scaling Scheme with IPC Controlling for SMT Processor
Hiromi Suzuki, Yousuke Ide, Yuta Tsukahara, Nobuyuki Yamasaki (Keio Univ) CPSY2018-106 DC2018-88
In the field of Real-Time embedded systems, both of high-performance and low-power consumption are required. In this pap... [more] CPSY2018-106 DC2018-88
pp.161-166
NLP, MSS
(Joint)
2019-03-14
12:55
Fukui Bunkyo Camp., Univ. of Fukui Experiment on SMT-LIB Encoding Methods for Simulink Models
Koki Takenaka, Daisuke Ishii (U. Fukui) MSS2018-82
Static analysis is useful for coverage testing etc. for Simulink models as for general-purpose programs. In this work, w... [more] MSS2018-82
pp.7-11
SS 2019-03-04
16:45
Okinawa   SQL queries for generating input constraints of SMT solvers from descriptions of combinatorial optimization problems
Genki Sakanashi, Masahiko Sakai, Naoki Nishida, Kenji Hashimoto (Nagoya Univ.) SS2018-66
The authors recently proposed an SQL-based language CombSQL+ for specifying combinatorial optimization problems, and sho... [more] SS2018-66
pp.85-90
R 2018-10-26
14:25
Tokyo Kikai-Shinko-Kaikan Bldg. A Note on Perfect Sampling for Stochastic Petri Nets
Hiroyuki Okamura, Kazuya Morihara, Tadashi Dohi (Hiroshima Univ.) R2018-35
In this paper, we consider the perfect sampling for stochastic Petri nets. The perfect simulation is a technique to draw... [more] R2018-35
pp.7-12
SS, DC 2017-10-20
09:30
Kochi Kochi City Culture-plaza CUL-PORT On the generation of constrained locating arrays using an SMT solver
Hao Jin (Osaka Univ.), Eun-Hye Choi (AIST), Tatsuhiro Tsuchiya (Osaka Univ.) SS2017-30 DC2017-29
Combinatorial interaction testing (CIT) is a well-known testing strategy for software systems. We inves-
tigate a new C... [more]
SS2017-30 DC2017-29
pp.55-60
SS, KBSE, IPSJ-SE [detail] 2017-07-19
11:10
Hokkaido   Reliability Verification of Dynamic Information in Dynamic Map for Vehicles
Yosuke Watanabe (Nagoya Univ.), Shuichi Sato (TCRDL), Hiroyuki Seki, Shoji Yuen (Nagoya Univ.) SS2017-3 KBSE2017-3
In automotive industry, high-precision spatial information such as the LDM(Local Dyanamic Map), that includes dynamic ob... [more] SS2017-3 KBSE2017-3
pp.13-18
SS 2017-03-09
09:55
Okinawa   Logical Formula Simplification and Static Analysis for Quantitative Information Flow Analysis using Model Counting
Masato Nakashima, Kenji Hashimoto, Masahiko Sakai, Hiroyuki Seki (Nagoya Univ.) SS2016-61
Model counting is one of the promising methods for quantitative information flow analysis. In this paper, we focus on th... [more] SS2016-61
pp.7-12
DC, SS 2016-10-27
15:30
Shiga Hikone Kinro-Fukushi Kaikan Bldg. Efficiency Improvement in #SMT-based Quantitative Information Flow Analysis
Masato Nakashima, Trung Chu Bao, Kenji Hashimoto, Masahiko Sakai, Hiroyuki Seki (Nagoya Univ.) SS2016-26 DC2016-28
Model counting is one of the promising methods for quantitative information flow analysis. In this paper, we focus on th... [more] SS2016-26 DC2016-28
pp.49-54
MSS 2015-03-06
10:25
Ishikawa IT Business Plaza Musashi Development of SMT-based model checker for assembly cords using interrupts reduction technique
Junpei Kobashi, Atsushi Takeshita, Satoshi Yamane, Kohei Sakurai (Kanazawa Univ.) MSS2014-100
Recently, embedded software has properties dependent on hardware (direct operation of address spaces, memory mapped I/O,... [more] MSS2014-100
pp.53-58
 Results 1 - 20 of 52  /  [Next]  
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