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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, CAS, MSS, SIP | 2016-06-16 09:50 |
Aomori | Hirosaki Shiritsu Kanko-kan | Verification Experiment of Scan-based Attack against a Trivium Cipher Circut Daisuke Oku, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.)  CAS2016-2 VLD2016-8 SIP2016-36 MSS2016-2 |
(To be available after the conference date) [more] | CAS2016-2 VLD2016-8 SIP2016-36 MSS2016-2 pp.7-12 |
| RECONF | 2013-05-21 14:45 |
Kochi | Kochi Prefectural Culture Hall | Performance Evaluation of Physical Unclonable FUnctions on Kintex-7 FPGA Yohei Hori, Toshihiro Katashita, Kazukuni Kobara (AIST) RECONF2013-17 |
The challenge-response properties of Physical Unclonable Functions (PUFs) on 28-nm process FPGA on the ten SASEBO-GIII ... [more] |
RECONF2013-17 pp.91-96 |
| ISEC | 2011-12-14 11:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Correlation Power Analysis Against Stream Cipher Enocoro-128 v2 Shugo Mikami, Dai Watanabe (Hitachi) ISEC2011-62 |
This paper describes side channel attack against the stream cipher Enocoro and our evaluation result on FPGA based-platf... [more] | ISEC2011-62 pp.1-6 |
| ISEC | 2010-12-15 13:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | The Mutual Information Analysis using a classification technique of combination Kuniji Wakabayashi, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2010-67 |
Against Side channel Attack Standard Evaluation BOard(SASEBO) implemented the AES encryption as hardware circuit, carr... [more] | ISEC2010-67 pp.13-18 |
| IT, ISEC, WBS | 2010-03-05 09:00 |
Nagano | Nagano-Engineering Campus, Shinshu University | A Comparative Study of CPA and MIA on Side-channel Attack Standard Evaluation Boards Asuka Taguchi, Yohei Hori, Hideki Imai (Chuo Univ.) IT2009-102 ISEC2009-110 WBS2009-81 |
Correlation Power Analysis (CPA) and Mutual Information Analysis (MIA) are applied to the AES circuits implemented on ... [more] |
IT2009-102 ISEC2009-110 WBS2009-81 pp.199-204 |
| IT, ISEC, WBS | 2010-03-05 09:25 |
Nagano | Nagano-Engineering Campus, Shinshu University | Countermeasures against Power Analysis Attacks in Assembly code Kazunori Kawamura, Keisuke Iwai, Takakazu Kurokawa (NDA) IT2009-103 ISEC2009-111 WBS2009-82 |
Countermeasures for AES software implementation against power analysis attacks are proposed in this paper. Intermediate ... [more] | IT2009-103 ISEC2009-111 WBS2009-82 pp.205-210 |
| IT, ISEC, WBS | 2010-03-05 09:50 |
Nagano | Nagano-Engineering Campus, Shinshu University | Electromagnetic Analysis from power line on SASEBO-R Tetsutaro Kanno, Keisuke Iwai, Takakazu Kurokawa (NDA) IT2009-104 ISEC2009-112 WBS2009-83 |
The EM-analysis, one of the Side Channel attacks, has advantage for the freedom of the measuring point, espacially it is... [more] | IT2009-104 ISEC2009-112 WBS2009-83 pp.211-216 |
| IT, ISEC, WBS | 2010-03-05 10:15 |
Nagano | Nagano-Engineering Campus, Shinshu University | Obtaining Local Information from FPGA Using Electromagnetic Analysis Takao Ochiai, Dai Yamamoto, Kouichi Itoh, Masahiko Takenaka, Naoya Torii, Daisuke Uchida, Toshiaki Nagai, Shinichi Wakana (Fujitsu Labs.) IT2009-105 ISEC2009-113 WBS2009-84 |
A side channel attack by means of electromagnetic analysis for SASEBO-AES was investigated. Local information from FPGA ... [more] | IT2009-105 ISEC2009-113 WBS2009-84 pp.217-223 |
| ISEC | 2009-12-16 14:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Electro Magnetic Analysis and Local Information of Cryptographic Hardware Hidekazu Morita, Yoshio Takahashi, Tsutomu Matsumoto, Junji Shikata (Yokohama National Univ.)) ISEC2009-75 |
We have analyzed local information obtained by measuring electromagnetic waves radiated from multiple places on a FPGA i... [more] | ISEC2009-75 pp.29-35 |
| VLD | 2009-03-12 10:05 |
Okinawa | Differential Power Analysis of bit-value against cipher implementation on FPGA Kazuki Okuyama, Kenji Kojima, Yuki Makino, Takeshi Fujino (Ritsumei Univ.) VLD2008-141 |
DPA side-channel attack is the encryption-key estimation method by the statistical analysis on circuit consumption power... [more] | VLD2008-141 pp.89-94 |
|
| ISEC | 2008-12-17 15:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Construction of the experiment environment for the CPA attack Daisaku Minamizaki, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2008-99 |
SASEBO(Side-channel Attack Standard Evaluation BOard) was developed with the aim of integrating at establishment of the ... [more] | ISEC2008-99 pp.61-66 |
| ISEC, LOIS | 2008-11-13 14:50 |
Aichi | Nagoya Noh Theater | An Experiment with DPA and DEMA on FPGA Equipped on SASEBO Takahiko Syouji, Akira Nozawa, Takayuki Kimura (Y.D.K. Co.,Ltd.), Tomoyasu Suzaki, Noritaka Yamashita, Yukiyasu Tsunoo (NEC Corporation) ISEC2008-77 OIS2008-53 |
(To be available after the conference date) [more] | ISEC2008-77 OIS2008-53 pp.29-34 |
| ISEC | 2008-05-16 09:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Verification of a side-channel attack to an AES circuit on SASEBO Daisaku Minamizaki, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2008-1 |
Recently, the research on the side-channel attack is actively done, and SASEBO board that conformed to the INSTAC32 was ... [more] | ISEC2008-1 pp.1-8 |
| ISEC | 2008-05-16 09:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | An implementation of an automatic analyzer for side channel attacks Keisuke Iwai, Daisaku Minamizaki, Takakazu Kurokawa (NDA) ISEC2008-2 |
Recently, environments for experiments of side-channel attacks are being developed. On the other hand, there is not enou... [more] | ISEC2008-2 pp.9-14 |
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