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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 9 of 9  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
RISING
(3rd)
2023-10-31
10:45
Hokkaido Kaderu 2・7 (Sapporo) [Poster Presentation] Prototype Power Flow Switching System for Virtual Grid Network
yuuki minagawa (KAIT), Haruhisa Ichikawa, Shinji Yokogawa (The Univ of Electro-Communications), Yoshito Tobe (Aoyama Gakuin Univ), Yuusuke Kawakita (KAIT)
This manuscript reports a prototype implementation of a system that automatically switches power flow. The Virtual grid ... [more]
ICD, ITE-IST 2014-07-03
11:15
Shimane Izumo-shi (Shimane) [Invited Talk] Extremely Low Power and Low Voltage Sucessive Approximation Register ADC
Hiroki Ishikuro (Keio Univ.) ICD2014-22
Recently, large number of research results of energy efficient, charge redistribution type, successive approximation reg... [more] ICD2014-22
pp.17-22
ASN, IPSJ-UBI 2013-05-17
09:50
Kumamoto Kumamoto University Implementation and Evaluation of Network Access Authentication considering multi-domain environment in Wireless Sensor Networks
Takahisa Sekiguchi, Kunitake Kaneko, Fumio Teraoka (Keio Univ.) ASN2013-38
In a wireless sensor network, sensor nodes are scattered widely and form a network automatically.
Authentication of sen... [more]
ASN2013-38
pp.253-258
ICD 2011-12-16
13:50
Osaka   A 284-uW 1.85-GHz 20-Phase Oscillator Using Transfer Gate Phase Couplers
Keisuke Okuno, Toshihiro Konishi, Hyeokjong Lee, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2011-132
We propose a transfer gate phase coupler for a low-power multi-phase oscillator (MPOSC). The phase coupler is an nMOS tr... [more] ICD2011-132
pp.149-154
MSS 2010-01-21
13:25
Aichi Toyota Central R&D Labs. Green Multicore-SoC Software-Execution Framework with Timely-Power-Gating Scheme
Masafumi Onouchi, Keisuke Toyama, Toru Nojiri, Makoto Satoh (Hitachi), Masayoshi Mase, Jun Shirako (Waseda Univ.), Mikiko Sato (Tokyo Univ. of Agr and Tech.), Masashi Takada, Masayuki Ito (Renesas), Hiroyuki Mizuno (Hitachi), Mitaro Namiki (Tokyo Univ. of Agr and Tech.), Keiji Kimura, Hironori Kasahara (Waseda Univ.) CST2009-38
We developed a software-execution framework for scalable increase of execution speed and low-power consumption based on ... [more] CST2009-38
pp.7-12
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2009-12-04
13:25
Kochi Kochi City Culture-Plaza [Invited Talk] A Project on Dynamically Reconfigurable Processors: MuCCRA -- Design emvironment, Low Power design and 3D wireless interconnect --
Hideharu Amano (Keio Univ.) RECONF2009-51
Dynamically reconfigurable processor project MuCCRA(Multi-Core
Configurable Reconfigurable Architecture) aims to establ... [more]
RECONF2009-51
pp.61-66
ICD, ITE-IST 2009-10-02
16:35
Tokyo CIC Tokyo (Tamachi) A High Linear and Wide Frequency Range RF Sampling Circuit for Discrete Time Signal Processing
Mamoru Sato, Hiroyuki Abe, Tadahiro Kuroda, Hiroki Ishikuro (Keio Univ.) ICD2009-59
This paper reports a highly linear RF sampler with wide operating frequency range and power supply range. A clock bootst... [more] ICD2009-59
pp.147-152
ICD, IPSJ-ARC, IPSJ-EMB 2009-01-14
16:30
Osaka Shoushin Kaikan A Low-Power Full-HD H.264 High-Profile Codec Based on a Heterogeneous Multiprocessor Architecture
Kenichi Iwata, Seiji Mochizuki, Motoki Kimura, Tetsuya Shibayama, Fumitaka Izuhara, Hiroshi Ueda (Renesas Tech Corp.), Koji Hosogi, Hiroaki Nakata, Masakazu Ehama (Hitachi Ltd.), Toru Kengaku, Takuichiro Nakazawa, Hiromi Watanabe (Renesas Tech Corp.) ICD2008-148
A video-size-scalable H.264 High-Profile codec including 19 application-specific CPUs for extensibility to multiple stan... [more] ICD2008-148
pp.111-116
DC, CPSY, IPSJ-SLDM, IPSJ-EMB 2008-03-27
08:45
Kagoshima   An Adaptive Multi-Performance Processor and its Evaluation
Seiichiro Yamaguchi, Yuichiro Oyama (Kyushu Univ.), Yuji Kunitake (Kyushu Inst. of Tech.), Tadayuki Matsumura, Yuriko Ishitobi, Masaki Yamaguchi, Donghoon Lee, Yusuke Kaneda (Kyushu Univ.), Toshimasa Funaki (Kyushu Inst. of Tech.), Masanori Muroyama, Tohru Ishihara, Toshinori Sato (Kyushu Univ.) DC2007-84 CPSY2007-80
This paper presents an energy efficient processor which can be used as a design alternative for the dynamic voltage scal... [more] DC2007-84 CPSY2007-80
pp.1-6
 Results 1 - 9 of 9  /   
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