Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICD |
2024-04-12 10:45 |
Kanagawa |
(Primary: On-site, Secondary: Online) |
[Invited Talk]
Recent Developments and Challenges for NAND Flash Memory Interface Takashi Toi (KIOXIA) |
(To be available after the conference date) [more] |
|
ICD |
2024-04-12 13:50 |
Kanagawa |
(Primary: On-site, Secondary: Online) |
[Invited Lecture]
Development of a Bridge Chip for Scalable Performance and Capacity Storage Systems Shinichi Ikeda, Akira Iwata, Goichi Otomo, Tomoaki Suzuki, Hiroaki Iijima, Mikio Shiraishi, Shinya Kawakami, Masatomo Eimitsu, Yoshiki Matsuoka, Kiyohito Sato, Shigehiro Tsuchiya, Yoshinori Shigeta, Takuma Aoyama (Kioxia) |
(To be available after the conference date) [more] |
|
ICD |
2023-04-10 10:20 |
Kanagawa |
(Primary: On-site, Secondary: Online) |
[Invited Lecture]
Synergistic Improvement of 3D Flash Memory by Combination of Single-crystal Channel and Cryogenic Operation. Hitomi Tanaka, Yuta Aiba, Takashi Maeda, Keiichi Sawa, Fumie Kikushima, Tomoya Sanuki (KIOXIA) |
(To be available after the conference date) [more] |
|
ICD |
2023-04-11 11:00 |
Kanagawa |
(Primary: On-site, Secondary: Online) |
[Invited Talk]
1 Tb 4b/Cell 176-Tier 3D NAND Flash with 4 Independent Planes for Read Tomoharu Tanaka (MMJ) ICD2023-9 |
In the presentation, a 1Tb 4b/cell 3D-NAND-Flash memory on a 176-tier technology with a 14.7Gb/mm2 bit density is shown ... [more] |
ICD2023-9 p.17 |
EE |
2023-01-20 10:25 |
Fukuoka |
Kyushu Institute of Technology (Primary: On-site, Secondary: Online) |
Design of fast ramping-up boost converters for NAND Flash Yuji Kanayama, Tanazawa Toru (Shizuoka Univ.) EE2022-44 |
A boost circuit is used to charge the word line capacitance load to a high voltage for writing and erasing the data in S... [more] |
EE2022-44 pp.101-106 |
SDM |
2020-01-28 15:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Future of Non-Volatile Memory - From Storage to Computing Kazunari Ishimaru (kioxia) SDM2019-87 |
More than thirty years passed since the first NAND flash memory was presented at the IEDM. The NAND flash memory expande... [more] |
SDM2019-87 p.19 |
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-14 14:15 |
Ehime |
Ehime Prefecture Gender Equality Center |
Neural Network-based Lifetime Prediction and Reliability Enhancement Techniques for 3D NAND Flash Memory Masaki Abe, Ken Takeuchi (Chuo Univ.) ICD2019-30 IE2019-36 |
NAND flash memories have lifetime such as data-retention time and read cycles. This paper proposes neural network techni... [more] |
ICD2019-30 IE2019-36 pp.7-12 |
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-15 15:45 |
Ehime |
Ehime Prefecture Gender Equality Center |
Design of optimal NV-memory configuration for hybrid SSD with QLC NAND flash memory Yoshiki Takai, Mamoru Fukuchi, Chihiro Matsui, Reika Kinoshita, Ken Takeuchi (Chuo Univ.) ICD2019-41 IE2019-47 |
In order to expand capacity and reduce cost of NAND flash memory, the number of bits per cell has been increased. Howeve... [more] |
ICD2019-41 IE2019-47 pp.59-63 |
SDM, ICD, ITE-IST [detail] |
2019-08-08 09:15 |
Hokkaido |
Hokkaido Univ., Graduate School /Faculty of Information Science and |
[Invited Talk]
* Tetsufumi Tanamoto (Teikyo Univ.) SDM2019-40 ICD2019-5 |
The development of quantum annealing machines (QAMs) based on superconducting qubits
has progressed considerably in re... [more] |
SDM2019-40 ICD2019-5 pp.21-26 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-07 13:45 |
Hiroshima |
Satellite Campus Hiroshima |
Autonomous SCM capacity adjustment method in SCM/NAND flash hybrid storage Chihiro Matsui, Ken Takeuchi (Chuo Univ.) CPM2018-94 ICD2018-55 IE2018-73 |
Performance of hybrid storage with storage class memory (SCM) and NAND flash memory is improved by using SCM as non-vola... [more] |
CPM2018-94 ICD2018-55 IE2018-73 pp.29-30 |
DC, SS |
2018-10-04 14:25 |
Aichi |
Inuyama City Kokusai-Kanko Center Freud |
Multi-stage Error Collection Adaptive for Reliability in NAND Flash Memory Ryo Ogura, Masato Kitakami (Chiba Univ.) SS2018-19 DC2018-20 |
[more] |
SS2018-19 DC2018-20 pp.7-12 |
ICD |
2018-04-19 10:10 |
Tokyo |
|
Reliability Enhancement Technique with Horizontal Error Detection and Vertical-LDPC in 3D-TLC NAND Flash Memories Shun Suzuki, Yoshiaki Deguchi, Toshiki Nakamura, Kyoji Mizoguchi, Ken Takeuchi (Chuo Univ.) ICD2018-1 |
Conventional Asymmetric Coding (AC) has been proposed for improving NAND flash memories. In this work, Horizontal Error ... [more] |
ICD2018-1 pp.1-6 |
ICD |
2018-04-19 10:35 |
Tokyo |
|
Application-optimized heterogeneously-integrated storage with non-volatile memories Chihiro Matsui, Ken Takeuchi (Chuo Univ.) ICD2018-2 |
Data center storages require application-optimized heterogeneous integration of non-volatile memories. Two types of stor... [more] |
ICD2018-2 pp.7-10 |
ICD |
2018-04-20 11:10 |
Tokyo |
|
[Invited Talk]
A 512Gb 3b/Cell 3D Flash Memory on a 96-Word-Line-Layer Technology Hiroshi Maejima, Kazushige Kanda, Susumu Fujimura, Teruo Takagiwa, Susumu Ozawa, Jumpei Sato, Yoshihiko Shindo, Manabu Sato, Naoaki Kanagawa, Junji Musha, Satoshi Inoue, Katsuaki Sakurai, Toshifumi Hashimoto (TMC), Hao Nguyen, Ken Cheah, Hiroshi Sugawara, Seungpil Lee (WDC), Toshiki Hisada, Tetsuya Kaneko, Hiroshi Nakamura (TMC) ICD2018-10 |
A 512Gb 3b/cell flash has been developed on a 96-WL-layer BiCS FLASH technology. This work implements three key technolo... [more] |
ICD2018-10 pp.39-44 |
SDM |
2018-01-30 13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Lateral Charge Migration Suppression Technique of 3D-NAND Flash by Vth Nearing Kyoji Mizoguchi, Shohei Kotaki, Yoshiaki Deguchi, Ken Takeuchi (Chuo Univ.) SDM2017-93 |
In the near data computing, a SSD controller embeds more processing units and RAMs to execute a part of application whic... [more] |
SDM2017-93 pp.9-12 |
ICD |
2017-04-20 13:50 |
Tokyo |
|
[Invited Lecture]
A 1.0 V Operation NAND Flash Memory Program Voltage Generator Fabricated with Standard CMOS Process and NAND Flash Process for IoT Local Devices Kota Tsurumi, Masahiro Tanaka, Ken Takeuchi (Chuo Univ.) ICD2017-5 |
NAND flash memory is considered as candidates for data storage of IoT local devices. The NAND flash memory program volta... [more] |
ICD2017-5 pp.23-28 |
ICD |
2017-04-20 14:15 |
Tokyo |
|
[Invited Lecture]
TLC NAND Flash Memory Control Techniques to Reduce Errors of Read-Hot and Cold Data for Data Centers Toshiki Nakamura, Atsuro Kobayashi, Ken Takeuchi (Chuo Univ.) ICD2017-6 |
In cloud data centers, NAND flash memory stores both read-hot and cold data. This paper describes that the threshold vol... [more] |
ICD2017-6 pp.29-34 |
ICD |
2017-04-20 16:10 |
Tokyo |
|
[Invited Talk]
A 512Gb 3b/Cell Flash Memory on 64-Word-Line-Layer BiCS Technology Ryuji Yamashita, Sagar Magia (WDC), Tsutomu Higuchi, Kazuhide Yoneya, Toshio Yamamura (Toshiba), Hiroyuki Mizukoshi, Shingo Zaitsu, Minoru Yamashita, Shunichi Toyama, Norihiro Kamae, Juan Lee, Shuo Chen, Jiawei Tao, William Mak, Xiaohua Zhang (WDC) ICD2017-9 |
A 512Gb 3b/cell flash has been developed on a 64-WL-layer BiCS technology. By using a four-block-EOC row decoding approa... [more] |
ICD2017-9 pp.45-50 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2017-03-10 17:00 |
Okinawa |
Kumejima Island |
A Scalable Data Centric Converged System for Big Data Analytics Yuki Sasaki, Kenji Takahashi, Keishi Sakanushi, Atsuhiro Kinoshita (Toshiba) CPSY2016-162 DC2016-108 |
Data analytics for IoT market is the most important issue today. Data needs to be converted to relevant information in a... [more] |
CPSY2016-162 DC2016-108 pp.399-404 |
ICD, CPSY |
2016-12-15 15:30 |
Tokyo |
Tokyo Institute of Technology |
[Poster Presentation]
Analysis of Read Disturb Error in NAND Flash Memory Hikaru Watanabe, Atsuro Kobayashi, Ken Takeuchi (Chuo Univ.) ICD2016-66 CPSY2016-72 |
Recently, as cloud computing technology and Social Networking Service spread, the applications whose data is read locall... [more] |
ICD2016-66 CPSY2016-72 p.51 |