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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SS, MSS |
2022-01-12 10:05 |
Nagasaki |
Nagasakiken-Kensetsu-Sogo-Kaikan Bldg. (Primary: On-site, Secondary: Online) |
Multitask Scheduling for Reducing Total Memory Consumption while Satisfying Deadlines using Adaptive Control according to Dynamic Change of Task Memory Consumption Ryosuke Arai, Akio Nakata (Hiroshima City Univ) MSS2021-48 SS2021-35 |
The authors have previously proposed a multi-task scheduling method LMCLF, which can reduce the total memory usage of th... [more] |
MSS2021-48 SS2021-35 pp.95-99 |
SS |
2019-03-04 10:40 |
Okinawa |
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An improved LLF scheduling for reducing heap memory consumption in multiprocessor real-time system by considering laxity time Yuki Machigashira, Akio Nakata (Hirosima City Univ.) SS2018-55 |
Real-time embedded systems are often designed as multitasking systems in order to improve responsiveness to multiple ext... [more] |
SS2018-55 pp.19-24 |
CPSY, VLD, RECONF, IPSJ-SLDM [detail] |
2013-01-17 13:25 |
Kanagawa |
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A Channel-based Communication/Synchronization Model for SW-HW Multitasking on Dynamically Partially Reconfigurable FPGAs Krzysztof Jozwik, Shinya Honda, Masato Edahiro (Nagoya Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroaki Takada (Nagoya Univ.) VLD2012-130 CPSY2012-79 RECONF2012-84 |
Dynamically Partially Reconfigurable (DPR) FPGAs allow for implementation of a concept of SW-HW multitasking where flow ... [more] |
VLD2012-130 CPSY2012-79 RECONF2012-84 pp.135-140 |
SS |
2012-05-10 14:40 |
Ehime |
Ehime Univ. |
On Multi-Task Scheduling for Reducing Heap Memory Consumption Using Live Variable Analysis Hiroki Funase, Akio Nakata (Hiroshima City Univ.) SS2012-2 |
Multitasking system often consume more memory than singletasking system, because when context switching occurs, the runn... [more] |
SS2012-2 pp.7-12 |
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