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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| SDM, OME | 2020-04-13 14:00 |
Okinawa | Okinawaken Seinen Kaikan (Cancelled, technical report was not issued) |
Metal Source/Drain Structure TFTs using poly-Si Crystallized by Blue Multi-Laser Diode Annealing Tatsuya Okada, Takashi Noguchi (Univ. Ryukyus) |
We have reported that Blue Multi-Laser Diode Annealing (BLDA) is effective to crystallize Si films with smooth surface. ... [more] | |
| SDM | 2015-06-19 13:40 |
Aichi | VBL, Nagoya Univ. | Fabrication of PtGe/Ge contacts with low hole barrier and its application to metal source/drain Ge p-channel MOSFETs Yuta Nagatomi, Shintaro Tanaka, Yuichi Nagaoka, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima (Kyushu Univ.)  SDM2015-47 |
The fabrication of PtGe/Ge contacts with low hole barrier height (ΦBP) and its electrical passivation were investigated.... [more] | SDM2015-47 pp.47-50 |
| SDM | 2015-06-19 14:15 |
Aichi | VBL, Nagoya Univ. | Understanding of Schottky Barrier Height Modulation at NiGe/Ge Interfaces for Metal S/D Ge CMOS Technology Hiroshi Oka, Yuya Minoura, Ryohei Asahara, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe (Osaka Univ.) SDM2015-48 |
Besides low solubility and activation rate of n-type dopant in Ge, Fermi level pinning (FLP) at metal/Ge interface leads... [more] | SDM2015-48 pp.51-55 |
| SDM | 2013-06-18 10:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Mobility Enhancement for Ge p-MOSFET with Metal Source/Drain by Hf Introduction into Gate Stack Keisuke Yamamoto, Takahiro Sada, Dong Wang, Hiroshi Nakashima (Kyushu Univ.) SDM2013-49 |
Metal source/drain (S/D) with extremely low parasitic resistance is needed for high performance Ge CMOS. We found that H... [more] | SDM2013-49 pp.29-32 |
| SDM | 2012-06-21 17:15 |
Aichi | VBL, Nagoya Univ. | Alleviation of Fermi level pinning for TiN/Ge contact and its application to MOS device Keisuke Yamamoto, Masatoshi Iyota, Dong Wang, Hiroshi Nakashima (Kyushu Univ.) SDM2012-61 |
It has been recognized that the formation of a metal/Ge contact with low electron barrier height and low contact resista... [more] | SDM2012-61 pp.97-102 |
| SDM | 2010-11-11 14:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Comprehensive understanding of oxygen vacancy induced effective work function modulation in high-k/metal gate stacks Takuji Hosoi, Masayuki Saeki, Yuki Kita, Yudai Oku, Hiroaki Arimura, Naomu Kitano (Osaka Univ.), Kenji Shiraishi, Keisaku Yamada (Univ. Tsukuba), Takayoshi Shimura, Heiji Watanabe (Osaka Univ.) SDM2010-175 |
Effective work function of p-type gate electrodes on Hf-based high-k dielectrics is known to decrease after high tempera... [more] | SDM2010-175 pp.23-28 |
| SDM | 2010-06-22 09:55 |
Tokyo | An401・402 Inst. Indus. Sci., The Univ. of Tokyo | Development of Silicon Nanowire MOSFETs through Atomic-Scale Design Concepts Shinji Migita, Yukinori Morita, Hiroyuki Ota (AIST) SDM2010-34 |
Process technology with atomic-scale precision is indispensable for fabrication of silicon nanowire MOSFETs. We present ... [more] | SDM2010-34 pp.5-10 |
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