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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| NC, MBE (Joint) |
2024-03-12 12:05 |
Tokyo | The Univ. of Tokyo (Primary: On-site, Secondary: Online) |
Exploring Motor Memory Structure for Hand Reaching from the Viewpoint of Segregation and Integration Akari Ogawa, Naotoshi Abekawa, Hiroaki Gomi (NTT)  NC2023-55 |
Two opposing motor skills, which normally prevent learning due to a memory interference, can be acquired when each is as... [more] | NC2023-55 pp.69-74 |
| CPM | 2023-07-31 15:40 |
Hokkaido | (Primary: On-site, Secondary: Online) |
Development of multi-layer film recording media with thermal diffusion layer for magnetic hologram recording Hirotomo Sugiura (TUT), Shinichiro Mito (TNCT), Yuichi Nakamura, Lim Pang Boey (TUT) CPM2023-15 |
Magnetic holograms, which are recorded the interference patterns as magnetization directions through thermomagnetic reco... [more] | CPM2023-15 pp.13-16 |
| NC, IBISML, IPSJ-BIO, IPSJ-MPS [detail] | 2022-06-29 15:00 |
Okinawa | (Primary: On-site, Secondary: Online) |
Emergence of Dynamical Orthogonal Basis Acquiring Large Memory Capacity in Modular Reservoir Computing Yuji Kawai (Osaka Univ.), Jihoon Park (NICT/Osaka Univ.), Ichiro Tsuda (Chubu Univ.), Minoru Asada (IPUT/Osaka Univ./Chubu Univ./NICT) NC2022-28 IBISML2022-28 |
The brain's ability to generate complex spatiotemporal patterns with a specific timing is essential for motor learning a... [more] | NC2022-28 IBISML2022-28 pp.193-198 |
| NC, MBE (Joint) |
2021-03-05 11:20 |
Online | Online | Memory Capacity of Sparse-Coding Hopfield model Implemented on Coherent Ising Machine Ryuta Sasaki, Toru Aonishi (TokyoTech), Kazushi Mimura (Hiroshima City Univ.), Masato Okada (Univ. Tokyo), Yoshihisa Yamamoto (NTT/Stanford Univ.) NC2020-68 |
The coherent Ising machine (CIM) is being developed as one of the Ising computers for solving combinatorial optimization... [more] | NC2020-68 pp.145-150 |
| ITS, WBS, RCC | 2020-12-15 13:50 |
Online | Online | Classification of pedestrians existing in visible or blind areas using Doppler radar
-- An Approach Using Long Short-Term Memory -- Sora Hayashi, Daiki Isobe (Ritsumeikan Univ.), Kenshi saho (Toyama Pref. Univ.), Masao Masugi (Ritsumeikan Univ.) WBS2020-29 ITS2020-25 RCC2020-32 |
In this report, the walking positions of pedestrians, whether they are directly visible from the observation point or in... [more] | WBS2020-29 ITS2020-25 RCC2020-32 pp.121-125 |
| EMM | 2020-03-05 16:45 |
Okinawa | (Cancelled but technical report was issued) |
[Poster Presentation]
Investigation of associative memory models for improving error correcting capability in digital watermarking scheme Kazuma Fukata, Masaki Kawamura (Yamaguchi Univ.) EMM2019-118 |
We propose an error correcting method using associative memory models, which can correct the errors of watermarks. The a... [more] | EMM2019-118 pp.85-90 |
| SDM | 2020-01-28 15:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Future of Non-Volatile Memory - From Storage to Computing Kazunari Ishimaru (kioxia) SDM2019-87 |
More than thirty years passed since the first NAND flash memory was presented at the IEDM. The NAND flash memory expande... [more] | SDM2019-87 p.19 |
| MRIS, ITE-MMS | 2019-12-05 15:35 |
Ehime | Ehime University | Comparative study of equalization techniques in holographic data storage Shinya Kurokawa, Shuhei Yoshida (Kindai Univ.) MRIS2019-42 |
In the holographic data storage, data patterns are represented by images in which 0 or 1 are arranged in a two-dimension... [more] | MRIS2019-42 pp.19-23 |
| HIP | 2019-10-30 13:35 |
Kyoto | Kyoto Terrsa | Prototype and Negative-Suggestibility Effects in Face Memory
-- A Processing Fluency Account -- Takashi Kato (Kansai Univ), Shigeru Mukaida (Hokkaido Information Univ) HIP2019-48 |
Using featural prototypes (i.e., novel faces with studied features taken from separate study faces), this study examined... [more] | HIP2019-48 pp.7-12 |
| TL | 2019-07-27 16:10 |
Hyogo | Hirao Seminar House, Konan University | [Poster Presentation]
Working Memory and Adult L2 Noun Class Learning Diego Dardon, Jeong Hyeonjeong, Azumi Tanabe-Ishibashi, Hiroko Sakaba (Tohoku Univ.) TL2019-27 |
Working memory and verbal short-term memory are important cognitive factors in second language grammar learning with wor... [more] | TL2019-27 pp.77-81 |
| EMM | 2019-01-11 11:00 |
Miyagi | Tohoku Univ. | Proposal of multiple Zero-Watermarking method using hetero-associative memory model Yuki Shimana, Masaki Kawamura (Yamaguchi Univ.) EMM2018-88 |
Zero-watermarking method is a watermarking method which do not embed a watermark into an image. Thus, the quality of the... [more] | EMM2018-88 pp.33-37 |
| MBE, NC (Joint) |
2018-11-22 14:30 |
Kyoto | Controlling of Working Memory by Synchronization of Oscillatory Activity in Inhibitory Neurons Kentaro Hayashida, Yasuhiro Tsubo (Ritsumeikan Univ.) NC2018-25 |
Working memory (WM) is a neural storage system which retains information temporarily. Some studies have claimed that WM ... [more] | NC2018-25 pp.11-16 |
|
| MBE, NC (Joint) |
2018-11-22 14:55 |
Kyoto | Analysis of the recalling process of associative memory model with astrocyte function Masaru Kondo, Yoshimasa Tawatsuji, Tatsunori Matsui (Waseda Univ.) NC2018-26 |
While it may take some time for humans to recall specific memories, the associative memory model constructed by intercon... [more] | NC2018-26 pp.17-21 |
|
| EMCJ, IEE-EMC, IEE-MAG | 2018-11-22 15:10 |
Overseas | KAIST | [Poster Presentation]
Signal Integrity Analysis for High-speed Memory Test Interface using Data Capture PCB Hyesoo Kim, Kyungjun Cho, Seongguk Kim, Joungho Kim (KAIST) EMCJ2018-80 |
In this paper, in high-speed graphic memory test interface, the trade-off relationship for electrical characteristic of ... [more] | EMCJ2018-80 p.63 |
| SDM, ICD, ITE-IST [detail] | 2018-08-08 15:00 |
Hokkaido | Hokkaido Univ., Graduate School of IST M Bldg., M151 | Study of new stacked type logic circuit with fabrication technology of 3D NAND flash memory
-- Comparison with conventional LUT scheme, and planar typescheme -- Fumiya Suzuki, Sigeyoshi Watanabe (Shonan Inst. of Tech.) SDM2018-43 ICD2018-30 |
Novel new stacked type logic circuit with fabrication technology of 3D flash memory has been newly proposed. Also, These... [more] | SDM2018-43 ICD2018-30 pp.95-100 |
| ITS, IE, ITE-MMS, ITE-HI, ITE-ME, ITE-AIT [detail] | 2018-02-15 11:15 |
Hokkaido | Hokkaido Univ. | A Note on Recurrent Neural Network-based Tactics Estimation in Soccer Videos Genki Suzuki, Sho Takahashi, Takahiro Ogawa, Miki Haseyama (Hokkaido Univ.) |
This paper presents a method that estimates team tactics in soccer videos by a recurrent neural network. In general, pl... [more] |
|
| MBE, NC (Joint) |
2017-05-26 10:20 |
Toyama | Toyama Prefectural Univ. | Decoding of EEG data during working memory task Yudai Gamano (Toyama Pref. Univ.), Chihiro Asanoi (Tokyo Woman's Christian Univ.), Katsumi Umeno, Ken-ichi Morishige (Toyama Pref. Univ.) MBE2017-3 |
Electroencephalography (EEG) studies of working memory (WM) have demonstrated oscillatory representations and mechanisms... [more] | MBE2017-3 pp.13-18 |
| WIT, IPSJ-AAC | 2017-03-11 16:05 |
Ibaraki | Tsukuba University of Technology (Kasuga Campus) | Development of Application to check Memory Ability for Elderly Humans Yusuke Sasaki, Haruka Akatsu, Chiemi Ishii, Mamoru Kobayashi, Hiroyuki Ishikawa (IbarakiPJCIT) WIT2016-93 |
ecently, it is known that if elderlies live only in the house, the body’s ability will decline due to less movement than... [more] | WIT2016-93 pp.141-144 |
| ICD, CPSY | 2016-12-15 15:30 |
Tokyo | Tokyo Institute of Technology | [Poster Presentation]
Error Pattern Analysis among Scaled Generations of NAND Flash Memories Yukiya Sakaki, Yusuke Yamaga, Ken Takeuchi (Chuo Univ.) ICD2016-69 CPSY2016-75 |
The capacity of NAND flash memory can be expanded by memory cell scaling. However, bit-errors are increased by memory ce... [more] | ICD2016-69 CPSY2016-75 p.57 |
| VLD, IPSJ-SLDM | 2016-05-11 15:20 |
Fukuoka | Kitakyushu International Conference Center | MERP-CNN: A Memory-Efficient Reconfigurable Processor for Convolutional Neural Networks Based on FPGA Xushen Han, Dajiang Zhou, Shinji Kimura (Waseda Univ.) VLD2016-5 |
Convolutional neural network has been paid so much attention in many intelligent applications especially image pattern r... [more] | VLD2016-5 pp.47-52 |
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