IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 212  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
SeMI, IPSJ-ITS, IPSJ-MBL, IPSJ-DPS 2024-05-17
11:15
Okinawa   Design and Inplementation of off-grid smart agriculture system using LEO satellite communications and photovoltaics
Shieru Otsuka, Kuniaki Uto, Hideharu Takahashi, Kei Sakaguchi (Tokyo Tech), Tadashi Kawamoto (Tressbio Lab) SeMI2024-10
In Japan, with declining and aging farmers, smart agriculture for efficient land management is gaining attention. Howeve... [more] SeMI2024-10
pp.47-51
SIS, ITE-BCT 2023-10-12
16:30
Yamaguchi HISTORIA UBE
(Primary: On-site, Secondary: Online)
[Tutorial Lecture] Technical Development of Intrusion Prevention Systems with Reconfigurable Devices
Tomoaki Sato (Hokusei Gakuen Univ.) SIS2023-19
The frequency of Internet use continues to increase in telework and remote work environments. Concurrently, there has be... [more] SIS2023-19
pp.19-24
NLP, CAS 2023-10-06
15:10
Gifu Work plaza Gifu A PWM/digital Converter for Improved Conversion Resolution using Frequency Multiplicator
Zhang He, Andrino Robles Roberto, Tomochika Harada (Yamagata Univ.) CAS2023-43 NLP2023-42
For IoT (Internet of Things) devices, a reduction in power consumption is desired. To reduce power consumption, researc... [more] CAS2023-43 NLP2023-42
pp.58-61
SDM, ICD, ITE-IST [detail] 2023-08-01
13:00
Hokkaido Hokkaido Univ. Multimedia Education Bldg. 3F
(Primary: On-site, Secondary: Online)
[Invited Talk] R and D of Low Power Semiconductor Technology and It's Application Expansions -- Review R and D of Semiconductor device and LSI for these 43 years --
Koichiro Ishibashi (UEC) SDM2023-38 ICD2023-17
LSI density has been doubling every two years for 64 years, since Moore’s law started in 1959. The presenter began resea... [more] SDM2023-38 ICD2023-17
pp.14-15
WPT 2023-06-30
15:55
Tokyo
(Primary: On-site, Secondary: Online)
[Invited Lecture] Low-loss Design for Matching Circuits Using Poincaré Length and RG Planes
Shinji Abe, Hikaru Kitaoka, Shoichi Sato (Power Wave) WPT2023-14
Impedance matching is essential for improving the efficiency of Wireless Power Transmission (WPT). This study seeks to f... [more] WPT2023-14
pp.18-21
SR 2023-05-11
10:20
Hokkaido Center of lifelong learning Kiran (Higashi Muroran)
(Primary: On-site, Secondary: Online)
Time Frame Design and Evaluation of the Number of Transmittable Bits for Differential Packet-Level Index Modulation
Hitoshi Yamasaki, Mai Ohta (Fukuoka Univ.), Hiroki Matsuura (NATANE eICT Lab.), Makoto Taromaru (Fukuoka Univ.) SR2023-3
LPWA is a communication method used in IoT and other applications. The communication time constraints (called duty cycle... [more] SR2023-3
pp.16-22
WPT 2023-03-17
12:35
Kyoto Kyoto-Univ. (Uji campus)
(Primary: On-site, Secondary: Online)
[Poster Presentation] An impedance matching circuit for 13.56 MHz focusing on circuit topology and Q-factor of inductor
Yasumasa Naka (TUT) WPT2022-50
An impedance matching circuit is fabricated focusing on circuit topology and an unloaded Q-factor of inductor to take pa... [more] WPT2022-50
pp.91-93
IN, NS
(Joint)
2023-03-02
16:20
Okinawa Okinawa Convention Centre + Online
(Primary: On-site, Secondary: Online)
Design and evaluation of a mobile agent framework for small-scale IoT devices over LPWA
Kazuya Sakamoto (Tohoku Univ.), Gen Kitagata (Morioka Univ.), Go Hasegawa (Tohoku Univ.) IN2022-96
In networks using LPWA and small IoT devices, it is important to suppress traffic because of the slow communication spee... [more] IN2022-96
pp.181-186
HWS, VLD 2023-03-01
13:50
Okinawa
(Primary: On-site, Secondary: Online)
Circuit Optimization and Simulation Evaluation for Ultra-Low Voltage of LRPUF Using Manufacturing Variability of Leakage Current
Shunkichi Hata, Kimiyoshi Usami (SIT) VLD2022-77 HWS2022-48
Low power consumption and low-voltage operation become critical issues to be addressed when PUF (Physically Unclonable F... [more] VLD2022-77 HWS2022-48
pp.25-30
ICTSSL, IN, NWS, IEE-SMF 2022-10-28
13:05
Nagano Shinshu University
(Primary: On-site, Secondary: Online)
Study of Storage Energy Loss in a Distributed Power Flow System for Smart Home Environment
Ruengwit Khwanrit, Yuto Lim, Saher Javaid (JAIST), Somsak Kittipiyakul (SIIT), Yasuo Tan (JAIST) IN2022-40
Today, renewable energy resources are a critical component of distributed energy systems. However, their intermittent na... [more] IN2022-40
pp.47-52
CPSY, DC, IPSJ-ARC [detail] 2022-07-27
09:45
Yamaguchi Kaikyo Messe Shimonoseki
(Primary: On-site, Secondary: Online)

Enrei Jo, Rei Miura, Toshinori Hosokawa (Nihon Univ), Masayosi Yoshimura (KSU) CPSY2022-1 DC2022-1
In recent years, with the low power design of VLSIs, many low power oriented don't care (X) identification methods and X... [more] CPSY2022-1 DC2022-1
pp.1-6
ED 2022-04-21
11:20
Online Online A High Process Portability All Digital Time domain A/D Converter
Takahiro Amada, Cong-Kha Pham (UEC Tokyo) ED2022-6
An all digital time domain A/D converter that can be largely synthesized has been proposed. The proposed circuit was des... [more] ED2022-6
pp.19-22
VLD, HWS [detail] 2022-03-07
13:15
Online Online [Memorial Lecture] An Accuracy Reconfigurable Vector Accelerator based on Approximate Logarithmic Multipliers
Lingxiao Hou, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) VLD2021-83 HWS2021-60
The logarithmic approximate multiplier proposed by Mitchell provides an efficient alternative to accurate multipliers in... [more] VLD2021-83 HWS2021-60
p.43
SS, MSS 2022-01-12
11:35
Nagasaki Nagasakiken-Kensetsu-Sogo-Kaikan Bldg.
(Primary: On-site, Secondary: Online)
A Method for Mesoscopic Modeling Method of Large Volume Traffic Flow Applying Process Mining Techniques
Kenji Uehara, Kunihiko Hiraishi (JAIST) MSS2021-51 SS2021-38
With the improvement of computing power and the widespread use of sensor technologies such as cameras and GNSS, highly a... [more] MSS2021-51 SS2021-38
pp.112-117
VLD, DC, RECONF, ICD, IPSJ-SLDM
(Joint) [detail]
2021-12-01
09:45
Online Online Low quiescent current LDO with FVF based PSRR enhanced circuit for wearable EEG measurement devices
Kenji Mii, Daisuke Kanemoto, Osamu Maida, Tetsuya Hirose (Osaka Univ.) VLD2021-18 ICD2021-28 DC2021-24 RECONF2021-26
This paper proposes a low quiescent current low-dropout regulator (LDO) with a flipped voltage follower (FVF)-based powe... [more] VLD2021-18 ICD2021-28 DC2021-24 RECONF2021-26
pp.7-12
RCS 2021-10-21
16:00
Online Online [Poster Presentation] A Study on Bayesian Receiver Design via Bilinear Inference for Scalable Cell-Free Massive MIMO
Takumi Takahashi (Osaka Univ.), Hiroki Iimori (JUB), Kengo Ando, Koji Ishibashi (UEC), Shinsuke Ibi (Doshisha Univ), Giuseppe Abreu (JUB) RCS2021-129
One of the main challenges in realizing uplink scalable cell-free massive multi-input multi-output (CF-mMIMO) is capacit... [more] RCS2021-129
pp.57-62
SCE 2021-08-06
15:00
Online Online High-Throughput Low-Latency Single-Flux-Quantum Circuits with Feedback Path
Ryota Kashima, Ikki Nagaoka, Tomoki Nakano, Masamitsu Tanaka, Taro Yamashita, Akira Fujimaki (Nagoya Univ.) SCE2021-5
We have introduced bit-parallel processing into high-speed, low-power microprocessors based on single-flux-quantum circu... [more] SCE2021-5
pp.19-24
RCS 2021-06-24
10:00
Online Online Reduction of Out-of-Band Radiation with Quantized Precoding using Gibbs Sampling in Massive MU-MIMO-OFDM
Taichi Yamakado, Riki Okawa, Yukithoshi Sanada (Keio Univ.) RCS2021-49
In this paper, a non-linear precoding algorithm with low out-of-band (OOB) radiation in a Massive multiple-input multipl... [more] RCS2021-49
pp.121-126
HWS, VLD [detail] 2021-03-03
14:30
Online Online Measurement of Voltage-variation-tolerant Temperature Sensor for Standard CMOS Chip with On-chip Solar Cell
Shuto Murohara, Tatsuya Banno, Tomoya Kimura, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2020-74 HWS2020-49
Aiming at realizing a CMOS-process-compatible external-component-free SoC with an on-chip solar cell and a temperature s... [more] VLD2020-74 HWS2020-49
pp.32-37
VLD, DC, RECONF, ICD, IPSJ-SLDM
(Joint) [detail]
2020-11-17
10:55
Online Online DET Flip-Flops with SEU Detection Capability Using DICE and C-Element
Xu Haijia, Kazuteru Namba (Chiba Univ.) VLD2020-14 ICD2020-34 DC2020-34 RECONF2020-33
Abstract A dual-edge-triggered flip-flop (DET-FF) composed of DICE latch (Dual Interlocked Storage Cell) and C-element ... [more] VLD2020-14 ICD2020-34 DC2020-34 RECONF2020-33
pp.18-23
 Results 1 - 20 of 212  /  [Next]  
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan