Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
EE |
2022-01-28 11:20 |
Online |
Online |
Basic Experiment of Anode Power Supply using LLC Resonant Converter for Hall Thruster Systems Hiromasa Kondo, Shinatora Choh, Hiroki Watanabe, Hiroaki Kusawake (JAXA) EE2021-44 |
JAXA is studying an anode power supply for realizing lightweight Hall thruster systems. The anode power supply has criti... [more] |
EE2021-44 pp.74-78 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 14:45 |
Online |
Online |
Diagnosis of Switching-Induced IR Drop by On-Chip Voltage Monitors Kazuki (Kobe Univ.), Leonidas Kataselas (Aristotle Univ.), Ferenc Fodor (IMEC), Alkis Hatzopoulos (Aristotle Univ.), Makoto Nagata (Kobe Univ.), Erik Jan Marinissen (IMEC) VLD2021-31 ICD2021-41 DC2021-37 RECONF2021-39 |
On-chip monitor (OCM) circuits enable us to observe dynamic power-supply (PS) waveforms within power domains individuall... [more] |
VLD2021-31 ICD2021-41 DC2021-37 RECONF2021-39 pp.83-86 |
DC |
2020-02-26 10:25 |
Tokyo |
|
Defective Chip Prediction Modeling Using Convolutional Neural Networks Ryunosuke Oka, Satoshi Ohtake (Oita Univ.), Kouichi Kumaki (Renesas) DC2019-87 |
In recent years, the cost of LSI testing which guarantees reliability has relatively increased due to the development of... [more] |
DC2019-87 pp.7-12 |
DC |
2020-02-26 15:00 |
Tokyo |
|
Improving Controllability of Signal Transitions in the High Switching Area of LSI Jie Shi, Kohei Miyase, Xiaoqing Wen, Seiji Kajihara (Kyutech) DC2019-94 |
Power consumption in LSI testing is larger than in functional mode. High power consumption causes excessive IR-drop and ... [more] |
DC2019-94 pp.49-54 |
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-15 15:20 |
Ehime |
Ehime Prefecture Gender Equality Center |
Evaluation of Inter-chip Inductive Coupling Wireless Communication Technology Hideto Kayashima, Takuya Kojima, Hayate Okuhara, Tsunaaki Shidei, Hideharu Amano (Keio Univ.) CPSY2019-48 |
Building block computing systems, which is one of the three-dimensional stacked LSI systems, use a wireless communicatio... [more] |
CPSY2019-48 pp.59-64 |
IMQ, IE, MVE, CQ (Joint) [detail] |
2019-03-15 10:45 |
Kagoshima |
Kagoshima University |
[Invited Talk]
Development of Realtime HEVC Encoder LSI and its applications Ken Nakamura (NTT) CQ2018-110 |
Ultra-high definition (UHD) video services have been spreading today. For example, 4K broadcasting has started in 2015 a... [more] |
CQ2018-110 p.97 |
HWS, VLD |
2019-02-28 10:00 |
Okinawa |
Okinawa Ken Seinen Kaikan |
Thermal transient analysis and evaluation of the heat generation and dissipation in three-dimensional stacked LSI Ryota Horigome, Kimiyoshi Usami (Shibaura Inst. of Tech.) VLD2018-107 HWS2018-70 |
As a technology for improving the degree of integration of LSI, there is a three-dimensional stacking technology of LSI ... [more] |
VLD2018-107 HWS2018-70 pp.85-90 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-07 15:15 |
Hiroshima |
Satellite Campus Hiroshima |
Real Chip Implementation of a verification scheme for an Inductive-Coupling ThruChip Interface Hideto Kayashima, Takuya Kojima, Hayate Okuhara, Hideharu Amano (Keio Univ.) CPSY2018-42 |
A building block computing system is one of the promising 3D Stacked VLSIs. It adopts an inductive coupling ThruChip Int... [more] |
CPSY2018-42 pp.53-58 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-06 14:55 |
Kumamoto |
Kumamoto-Kenminkouryukan Parea |
An Approach to Selection of Classifiers and their Thresholds for Machine Learning Based Fail Chip Prediction Daichi Yuruki, Satoshi Ohtake (Oita Univ), Yoshiyuki Nakamura (Renesas Electronics) VLD2017-36 DC2017-42 |
Today, semiconductor technologies have developed and advance the integration density of LSI circuits.
A technique which... [more] |
VLD2017-36 DC2017-42 pp.55-60 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-07 09:25 |
Kumamoto |
Kumamoto-Kenminkouryukan Parea |
On Avoiding Test Data Corruption by Optimal Scan Chain Grouping Yucong Zhang, Stefan Holst, Xiaoqing Wen, Kohei Miyase, Seiji Kajihara (KIT), Jun Qian (AMD) VLD2017-42 DC2017-48 |
Scan shift operations cause many gates to switch simultaneously. As a result, excessive IR-drop may occur, disrupting th... [more] |
VLD2017-42 DC2017-48 pp.91-94 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2017-03-10 09:30 |
Okinawa |
Kumejima Island |
Pass/Fail Prediction in LSI Test Considering Fail Die Characteristics. Takazumi Sato, Michiko Inoue (NAIST) CPSY2016-144 DC2016-90 |
Various kinds of tests are applied to LSIs in several satages to ship only fully reliable products.However, a lot of kin... [more] |
CPSY2016-144 DC2016-90 pp.291-296 |
DC |
2017-02-21 12:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
An Approach to Performance Improvement of Machine Learning Based Fail Chip Discrimination Daichi Yuruki, Satoshi Ohtake (Oita Univ), Yoshiyuki Nakamura (Renesas System Design) DC2016-77 |
Today, advancements of semiconductor technology have progress to high integration of LSI circuits.
A technique which ke... [more] |
DC2016-77 pp.17-22 |
DC |
2016-06-20 16:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Internatoinal Conferecen Report: VTS2016 Kazumi Hatayama (Gunma Univ./Creatron Corp.) DC2016-16 |
This talk provide a report of VTS2016 (34th IEEE VLSI Test Symposium), which was held in Las Vegas, Nevada, USA, in Apri... [more] |
DC2016-16 pp.37-42 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2016-03-25 15:45 |
Nagasaki |
Fukue Bunka Hall/Rodou Fukushi Center |
A consideration on variation correction for fail prediction in LSI test Ryo Ogawa (NAIST), Yoshiyuki Nakamura (Renesas Semiconductor Package & Test Solutions), Michiko Inoue (NAIST) CPSY2015-158 DC2015-112 |
Recently, a test cost reduction using data mining has been attracted. It is expected to reduce the cost by predicting fa... [more] |
CPSY2015-158 DC2015-112 pp.271-276 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-01 15:45 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
[Fellow Memorial Lecture]
Improving System Dependability by VLSI Test Technology Seiji Kajihara (KIT) VLD2015-44 CPM2015-128 ICD2015-53 CPSY2015-64 DC2015-40 RECONF2015-51 |
VLSI Test technology for detection of manufacturing faults has been developed to improve test quality that is the capabi... [more] |
VLD2015-44 CPM2015-128 ICD2015-53 CPSY2015-64 DC2015-40 RECONF2015-51 pp.43-44(VLD), pp.9-10(CPM), pp.9-10(ICD), pp.19-20(CPSY), pp.43-44(DC), pp.19-20(RECONF) |
EMD |
2015-10-02 16:50 |
Saitama |
Fuji Electric FA Components & SystemCo.,Ltd. |
Degradation Phenomenon of Electrical Contacts by using a Micro-Sliding Mechanism
-- The comparison with input waveforms concerning of minimal sliding amplitudes under some conditions -- Shin-ichi Wada, Keiji Koshida (TMC), Koichiro Sawa (NIT) EMD2015-66 |
Authors have studied the degradation phenomenon on contact resistance under the influences of an external micro-oscillat... [more] |
EMD2015-66 pp.37-42 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-07 16:05 |
Aomori |
|
A 2.4x-Real-Time VLSI Processor for 60-kWord Continuous Speech Recognition Guangji He, Yuki Miyamoto, Kumpei Matsuda, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ) VLD2013-52 ICD2013-76 IE2013-52 |
This paper describes a low-power VLSI chip for speaker-independent 60-kWord continuous speech recognition based on a co... [more] |
VLD2013-52 ICD2013-76 IE2013-52 pp.29-34 |
ICD, ITE-IST |
2013-07-05 17:15 |
Hokkaido |
San Refre Hakodate |
Equivalent circuit representation of silicon substrate coupling of active RF components Naoya Azuma, Makoto Nagata (Kobe univ.) ICD2013-44 |
Substrate coupling of radio frequency (RF) active components is represented by equivalent circuits unifying a resistive ... [more] |
ICD2013-44 pp.125-128 |
DC |
2013-06-21 14:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A theretical discussion for testabilty of a degraded LSI in field Yasuo Sato, Seiji Kajihara (Kyushu Inst. of Tech.) DC2013-12 |
Various electronic systems that consist of variety of LSIs require very high reliability in field. However, physical deg... [more] |
DC2013-12 pp.13-18 |
SDM |
2013-02-04 13:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Nano-ordered Evaluation for Local Distribution of Adhesion Strength Between Cu/Dielectric in LSI Circuit S.Kamiya, Hisashi Sato (Nagoya Inst. of Tech.), Masaki Omiya (Keio Univ.), Nobuyuki Shishido, Kozo Koiwa, Masahiro Nishida (Nagoya Inst. of Tech.), Tomoji Nakamura, Takashi Suzuki (Fujitsu Labs), Takeshi Nokuo, Toshiaki Suzuki (JEOL) SDM2012-153 |
One of serious problems for LSI is the weakness of interfaces in Cu/dielectric systems along with the trend of further m... [more] |
SDM2012-153 pp.15-20 |