Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICD, SDM |
2014-08-05 15:45 |
Hokkaido |
Hokkaido Univ., Multimedia Education Bldg. |
A Low Power , Area Efficient Frequency Calibration Technique with Shared Array Oscillator for Inductive-Coupling Transceiver Naoki Kitazawa, Teruo Jyo, Hiroki Ishikuro (Keio Univ.) SDM2014-81 ICD2014-50 |
This paper presents a low power, small area Frequency Acquisition Circuit (FAC) for a pulse-based inductive coupling tra... [more] |
SDM2014-81 ICD2014-50 pp.105-108 |
VLD |
2014-03-05 11:15 |
Okinawa |
Okinawa Seinen Kaikan |
Inductive-Coupling Interface for Multiple-Memory Chip Stacking Mitsuko Saito, Tadahiro Kuroda (Keio Univ.) VLD2013-159 |
Inductive-coupling interface for multiple-memory chip stacking is proposed. The number of stacked memory chips was limit... [more] |
VLD2013-159 pp.137-140 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-29 13:45 |
Kagoshima |
|
A 3-D NoC architecture using CSMA/CD bus for inter-chip wireless communication Takahiro Kagami, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) CPSY2013-72 |
Wireless 3-D chip multiprocessors(CMPs), in which inductors with CMOS-based transceivers are used for an inter-chip wire... [more] |
CPSY2013-72 pp.77-82 |
DC, CPSY (Joint) |
2013-08-02 10:45 |
Fukuoka |
Kitakyushu-Kokusai-Kaigijyo |
An Extension of Routing Strategy for Wireless Bus-Based 3-D NoCs Takahiro Kagami, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) CPSY2013-18 |
We proposed Headfirst sliding routing for wireless bus-based 3-D network on chip(NoC), in which the static Time Division... [more] |
CPSY2013-18 pp.49-54 |
ICD, ITE-IST |
2013-07-04 09:55 |
Hokkaido |
San Refre Hakodate |
A Low Power Fast Lock All-Digital CDR with TDC Combined DLL Yuki Urano, Won-Joo Yun, Kaoru Kohira, Teruo Jyo, Tadahiro Kuroda, Hiroki Ishikuro (Keio Univ.) ICD2013-25 |
This paper presents an all-digital CDR with TDC combined DLL which can be used for not only NRZ signaling but also pulse... [more] |
ICD2013-25 pp.7-12 |
ICD, ITE-IST |
2013-07-05 16:25 |
Hokkaido |
San Refre Hakodate |
A Intermittently Operating LNA with Optimal On-Off Controller for Pulse-Based Inductive-Coupling Transceiver Teruo Jyo, Kaoru Kohira, Yuki Urano, Tadahiro Kuroda, Hiroki Ishikuro (Keio Univ.) ICD2013-42 |
This paper presents a low-power LNA for a inductive-coupling tranceiver. Intermittently operating technique to turn on L... [more] |
ICD2013-42 pp.113-118 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 09:00 |
Fukuoka |
Centennial Hall Kyushu University School of Medicine |
A Routing Strategy for 3-D NoCs Incorporating Bus and Network Takahiro Kagami, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) CPSY2012-50 |
Inductive coupled 3-D chip stacking technique allows to change types and
numbers of stacked chips after fabrication.
A... [more] |
CPSY2012-50 pp.15-20 |
ICD, SDM |
2012-08-03 15:30 |
Hokkaido |
Sapporo Center for Gender Equality, Sapporo, Hokkaido |
A Low Voltage High-Speed Inductive-Coupling Transceiver with Adaptive Pulse Width Controller Using Multi-Phase Oscillator Yuki Urano, Takeshi Matsubara (Keio Univ.), Isamu Hayashi (STARC), Abul Hasan Johari, Kaoru Kohira, Teruo Jyo, Tadahiro Kuroda, Hiroki Ishikuro (Keio Univ.) SDM2012-86 ICD2012-54 |
This paper presents a pulse-based inductive-coupling transceiver with adaptive pulse width controller for high-speed wir... [more] |
SDM2012-86 ICD2012-54 pp.127-132 |
EMCJ |
2012-04-20 14:45 |
Ishikawa |
Kanazawa Univ. |
Performance of Inter Decoupling by Magnetic Thin Film Noise Suppressor Integrated to LSI Chip Sho Muroga, Wataru Kodate, Yasushi Endo, Masahiro Yamaguchi (Tohoku Univ.) EMCJ2012-6 |
New measurement method for L-coupling on the basis of the IEC standard to evaluate the sheet type ferromagnetic noise su... [more] |
EMCJ2012-6 pp.31-36 |
ICD, ITE-IST |
2011-07-22 16:10 |
Hiroshima |
Hiroshima Institute of Technology |
An 0.5V Transceiver in 65nm CMOS for High-Speed Wireless Proximity Interface Takeshi Matsubara (Keio Univ.), Isamu Hayashi (STARC), Abul Hasan Johari, Satoshi Kumaki, Kaoru Kohira, Tadahiro Kuroda, Hiroki Ishikuro (Keio Univ.) ICD2011-36 |
This paper presents a pulse-based inductive-coupling transceiver in 65nm CMOS for High-speed wireless proximity communic... [more] |
ICD2011-36 pp.119-123 |
ICD |
2010-04-23 13:45 |
Kanagawa |
Shonan Institute of Tech. |
[Invited Talk]
Non-contact Chip-to-Chip Interfaces for 3D System Integration Hiroki Ishikuro, Tadahiro Kuroda (Keio Univ.) ICD2010-16 |
Low cost, small size, low power, and wide-band non-contact area interfaces for inter-chip links in 3-D system integratio... [more] |
ICD2010-16 pp.83-88 |
ICD |
2010-04-23 14:35 |
Kanagawa |
Shonan Institute of Tech. |
A 2.5Gb/s/ch 4PAM Inductive-Coupling Transceiver for Non-Contact Memory Card Yasuhiro Take, Shusuke Kawai, Hiroki Ishikuro, Tadahiro Kuroda (Keio Univ.) ICD2010-17 |
A 2.5Gb/s/ch 4PAM inductive-coupling link is developed for non-contact memory cards. The data rate is 3× higher than tha... [more] |
ICD2010-17 pp.89-92 |
ICD |
2009-12-15 17:00 |
Shizuoka |
Shizuoka University (Hamamatsu) |
A 3D Processor Using Inductive-Coupling Inter-Chip Link
-- 3D System Integration of a 90nm CMOS Processor and a 65nm CMOS SRAM -- Kiichi Niitsu (Keio Univ./JST), Yasuhisa Shimazaki (Keio Univ./Renesas Technology), Yasufumi Sugimori, Yoshinori Kohama, Kazutaka Kasuga (Keio Univ.), Itaru Nonomura (Renesas Technology), Makoto Saen, Shigenobu Komatsu, Kenichi Osada, Naohiko Irie (Hitachi), Toshihiro Hattori, Atsushi Hasegawa (Renesas Technology), Tadahiro Kuroda (Keio Univ.) ICD2009-105 |
A 90nm CMOS processor is mounted face down on a package by C4 bump and a 65nm CMOS 1MB SRAM is glued on it face up. The ... [more] |
ICD2009-105 pp.163-168 |
ICD, ITE-IST |
2007-07-27 11:10 |
Hyogo |
|
A detachable high-speed wireless interface for LSI logic monitoring using pulse-based inductive-coupling technique Hiroki Ishikuro (Keio Univ.), Toshihiko Sugahara, Yoichi Takahata (Renesas Solutions Corp.), Shunichi Iwata (Renesas Technology Corp.), Yutaka Takikawa (Renesas Design Corp.), Tadahiro Kuroda (Keio Univ.) ICD2007-60 |
A detachable high-speed wireless interface was developed for monitoring of logic operation of a Si-chip through LSI pack... [more] |
ICD2007-60 pp.135-140 |