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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, HWS | 2023-10-31 15:00 |
Mie | (Primary: On-site, Secondary: Online) |
Side-Channel Leakage Evaluation of 3D CMOS Chip Stacking Kazuki Monta, Rikuu Hasegawa, Takuji Miki, Makoto Nagata (Kobe Univ.)  HWS2023-57 ICD2023-36 |
2.5D and 3D packaging are methodologies that include multiple integrated circuit (IC) chips. They deliver enhanced perfo... [more] | HWS2023-57 ICD2023-36 pp.16-19 |
| LQE, OPE, CPM, EMD, R | 2023-08-24 14:40 |
Miyagi | Tohoku university (Primary: On-site, Secondary: Online) |
[Invited Talk]
Silicon photonics COSA Yuriko Kawamura (NTT) R2023-22 EMD2023-17 CPM2023-27 OPE2023-66 LQE2023-13 |
We present a silicon photonics COSA(coherent optical sub-assembly). The architecture of the silicon photonics chip and t... [more] | R2023-22 EMD2023-17 CPM2023-27 OPE2023-66 LQE2023-13 pp.34-37 |
| LQE, OPE, CPM, EMD, R | 2023-08-25 10:00 |
Miyagi | Tohoku university (Primary: On-site, Secondary: Online) |
[Invited Talk]
Status and Prospects of the Integrated Photonics Ecosystem Tsuyoshi Horikawa (Tokyo Tech) R2023-29 EMD2023-24 CPM2023-34 OPE2023-73 LQE2023-20 |
The current status and future evolution of the business ecosystem that supports the development of integrated photonics ... [more] | R2023-29 EMD2023-24 CPM2023-34 OPE2023-73 LQE2023-20 pp.63-66 |
| SDM, ICD, ITE-IST [detail] | 2023-08-01 11:10 |
Hokkaido | Hokkaido Univ. Multimedia Education Bldg. 3F (Primary: On-site, Secondary: Online) |
Evaluation on Flip-Chip Packaging for Quantum Computers at Cryogenic Temperature Misato Taguchi, Ryozo Takahashi (Kobe Univ.), Masako Kato, Nobuhiro Kusuno (Hitachi, Ltd), Takuji Miki, Makoto Nagata (Kobe Univ.) SDM2023-37 ICD2023-16 |
Quantum Computers are the most promising technologies to archive more complex calculations. At the same time, much large... [more] | SDM2023-37 ICD2023-16 pp.10-13 |
| HWS, VLD | 2023-03-04 14:20 |
Okinawa | (Primary: On-site, Secondary: Online) |
Side-channel Information Leakage Resistance Evaluation of Cryptographic Multi- chip Modules Takumi Matsumaru, Kazuki Monta (Kobe Univ.), Takaaki Okidono (SCU), Takuzi Miki, Makoto Nagata (Kobe Univ.) VLD2022-122 HWS2022-93 |
Demand for multi-chip packaging technology is rising. This study focuses on two types of packaging technologies in parti... [more] | VLD2022-122 HWS2022-93 pp.273-278 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2022-11-29 14:40 |
Kumamoto | (Primary: On-site, Secondary: Online) |
Evaluating system level security of cryptography module Takumi Matsumaru, Kazuki Monta (Kobe Univ.), Takaaki Okidono (SCU), Takuji Miki, Makoto Nagata (Kobe Univ.) VLD2022-32 ICD2022-49 DC2022-48 RECONF2022-55 |
Packaging technology is a technique used to encapsulate semiconductor chips in a frame, and has been attracting attentio... [more] | VLD2022-32 ICD2022-49 DC2022-48 RECONF2022-55 pp.78-81 |
| OPE, LQE, OCS | 2022-05-13 16:55 |
Online | Online | [Special Invited Talk]
GI-Core Multimode and Single-Mode Polymer Waveguides for High-Density Co-Packaging Takaaki Ishigure (Keio Univ.) OCS2022-9 OPE2022-9 LQE2022-9 |
Glowing interests has been focused on the co-packaging optics technology in which a high-speed optical transceiver compo... [more] | OCS2022-9 OPE2022-9 LQE2022-9 pp.34-39 |
| EMCJ, MW, EST, IEE-EMC [detail] | 2019-10-25 15:55 |
Miyagi | Tohoku Gakuin University(Conf. Room 2, Eng. Bldg. 1) | Noise Suppression with Magnetic Composite Sheets in IC chip packaging and Improvements of Wireless Communication Performance Koh Watanabe, Kosuke Jike, Satoshi Tanaka, Noriyuki Miura, Makoto Nagata (Kobe Univ.), Akihiro Takahashi, Yasunori Miyazawa, Masahiro Yamaguchi (Tohoku Univ.) EMCJ2019-67 MW2019-96 EST2019-75 |
Magnetic composite sheets of ferrite powders were newly packaged between an IC chip and an interposer substrate as a new... [more] | EMCJ2019-67 MW2019-96 EST2019-75 pp.175-178 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-07 14:35 |
Hiroshima | Satellite Campus Hiroshima | Analysis of Conductive Power Noise Characteristics in Digital IC Chips between two Different IC Packaging Structures Akihiro Tsukioka, Kosuke Jike, Koh Watanabe, Noriyuki Miura, Makoto Nagata (Kobe Univ.) CPM2018-96 ICD2018-57 IE2018-75 |
The conducted and radiated emission are caused by the dynamic power consumption in digital circuit operations. The chara... [more] | CPM2018-96 ICD2018-57 IE2018-75 pp.37-42 |
| SDM, ICD, ITE-IST [detail] | 2018-08-08 12:50 |
Hokkaido | Hokkaido Univ., Graduate School of IST M Bldg., M151 | Measurements and Analysis of Power Supply Noise in Digital IC Chip Kosuke Jike, Akihiro Tsukioka, Ryohei Sawada, Koh Watanabe, Noriyuki Miura, Makoto Nagata (Kobe Univ) SDM2018-39 ICD2018-26 |
Dynamic power noise can be the root cause of electromagnetic compatibility (EMC) problems of electromagnetic interferenc... [more] | SDM2018-39 ICD2018-26 pp.77-82 |
| MWP | 2017-11-09 14:05 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Packaging of LiNbO3 optical device by low-temperature Au-Au bonding in ambient air Ryo Takigawa (Kyushu Univ.) MWP2017-46 |
As an alternative to conventional AuSn solder bonding, we have developed low-temperature solid-state bonding method of A... [more] | MWP2017-46 pp.7-11 |
| LQE, OPE, EMD, R, CPM | 2016-08-25 09:45 |
Hokkaido | Packaging of 16ch (4chx4) Integrated Light Sources with Laser Diode Arrays on Silicon Substrate. Motoyuki Nishizawa, Nobuaki Hatori, Yu Tanaka, Mitsuru Kurihara, Kazuhiko Kurata (PETRA) R2016-20 EMD2016-24 CPM2016-33 OPE2016-54 LQE2016-29 |
We are developing packaging technology of hybrid integrated light sources on Silicon platform for realization high capac... [more] | R2016-20 EMD2016-24 CPM2016-33 OPE2016-54 LQE2016-29 pp.5-8 |
|
| EMT, MW, OPE, MWP, EST, IEE-EMT [detail] | 2015-07-16 13:50 |
Hokkaido | Kushiro City Lifelong Learning Center | RFIC Flip-Chip Interconnection Using a Fiber Type Anisotropic Conductive Film Takeo Owada, Mizuki Motoyoshi, Suguru Kameda, Noriharu Suematsu, Tadashi Takagi, Kazuo Tsubouchi (Tohoku Univ.) EMT2015-14 MW2015-52 OPE2015-26 EST2015-18 MWP2015-17 |
RFIC flip-chip mounting technique is important to realize compact and high-performance transceivers like mobile phones. ... [more] | EMT2015-14 MW2015-52 OPE2015-26 EST2015-18 MWP2015-17 pp.35-39 |
| EMT, MW, OPE, MWP, EST, IEE-EMT [detail] | 2015-07-17 10:25 |
Hokkaido | Kushiro City Lifelong Learning Center | Single-mode polymer optical waveguides using low-loss organic-inorganic hybrid materials Kazuki Yasuhara, Sho Yoshida, Takaaki Ishigure (Keio Univ.) EMT2015-43 MW2015-81 OPE2015-55 EST2015-47 MWP2015-46 |
To apply to silicon photonics chip packaging, we fabricate a very low-loss single-mode polymer optical waveguide at 1550... [more] | EMT2015-43 MW2015-81 OPE2015-55 EST2015-47 MWP2015-46 pp.203-208 |
| OCS, OPE | 2015-05-15 16:20 |
Tokyo | Kikai-Shinko-Kaikan Bldg(Tokyo) | 32x32 Strictly Non-Blocking Si-Wire Optical Path Switch Ken Tanizawa, Keijiro Suzuki, Munehiro Toyama, Minoru Ohtsuka, Nobuyuki Yokoyama, Kazuyuki Matsumaro, Miyoshi Seki, Keiji Koshino (AIST), Toshio Sugaya (Furukawa Electric), Satoshi Suda, Guangwei Cong (AIST), Toshio Kimura (Furukawa Electric), Kazuhiro Ikeda, Shu Namiki, Hitoshi Kawashima (AIST) OCS2015-8 OPE2015-8 |
In order to realize dynamic optical path networks that transmit coarse-granular video traffics with ultra-low energy con... [more] | OCS2015-8 OPE2015-8 pp.33-38 |
| EMD, LQE, OPE, CPM, R | 2014-08-22 14:25 |
Hokkaido | Otaru Economy Center | Opto-electronic hybrid integrated chip packaging technology for silicon photonic platform using gold-stud bump bonding Mitsuo Usui, Kotaro Takeda, Hirooki Hirata, Hiroshi Fukuda, Tai Tsuchizawa, Hidetaka Nishi, Rai Kou, Tatsuro Hiraki, Kentaro Honda, Masafumi Nogawa, Koji Yamada, Tsuyoshi Yamamoto (NTT) R2014-45 EMD2014-50 CPM2014-65 OPE2014-75 LQE2014-49 |
We propose a new solder-free and low-temperature (200 ℃ or less) flip-chip integration technology for silicon photonic p... [more] | R2014-45 EMD2014-50 CPM2014-65 OPE2014-75 LQE2014-49 pp.109-114 |
| OPE | 2013-12-20 13:05 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Optrical Packaging of Silicon Phtonic Devices
-- External Connection of Parallel Optical Signals -- Yoichi Taira, Hidetoshi Numata (IBM Japan) OPE2013-138 |
Optical packaging method is necessary for silicon nanophotinic devices. We evaluate various optical connection methods f... [more] | OPE2013-138 pp.1-6 |
| OPE | 2013-12-20 14:35 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | 100-km Optical-Fiber Transmission by 10-Gb/s Si Mach-Zehnder Modulator Module Hiroki Ishihara, Teijiro Ori, Kazuhiro Goi, Kensuke Ogawa (Fujikura) OPE2013-141 |
Transmission performances of packaged 10-Gb/s silicon based Mach-Zehnder modulator are characterized. The I/O sections o... [more] | OPE2013-141 pp.19-24 |
| LQE, CPM, EMD, OPE, R | 2012-08-23 17:30 |
Miyagi | Tohoku Univ. | Data Transmission Demonstration at 16 Gbps/ch of a 24-channel O/E Hybrid Module with the Polynorbornene based Optical Waveguide Yuka Ito, Shinsuke Terada, Motoya Kaneta, Akihiro Horimoto, Shinya Arai, Koji Choki (Sumitomo Bakelite) R2012-34 EMD2012-40 CPM2012-65 OPE2012-72 LQE2012-38 |
A new bidirectional 24-channel optical-electrical (O/E) hybrid module with polynorbornene (PNB) based optical waveguide ... [more] | R2012-34 EMD2012-40 CPM2012-65 OPE2012-72 LQE2012-38 pp.67-71 |
| MW, ED | 2011-01-14 14:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A Wafer-Level-Chip-Size-Package Technique with Inverted Microstrip Lines for mm-wave Si CMOS ICs Yasufumi Kawai, Shinji Ujita, Takeshi Fukuda, Hiroyuki Sakai, Tetsuzo Ueda, Tsuyoshi Tanaka (Panasonic) ED2010-191 MW2010-151 |
We present a novel wafer-level-chip-size-package (WLCSP) technique with inverted microstrip line (IMSL) for mm-wave Si-C... [more] | ED2010-191 MW2010-151 pp.87-90 |
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