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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
HWS |
2018-04-13 13:55 |
Fukuoka |
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Energy Evaluation of FPGA Pairing Implementation with Pipeline Modular Multiplier Yusuke Nagahama, Daisuke Fujimoto, Junichi Sakamoto, Tsutomu Matsumoto (YNU) HWS2018-5 |
Energy consumption and latency are important features of dedicated hardware bilinear pairing calculators. However publi... [more] |
HWS2018-5 pp.23-28 |
IT, ISEC, WBS |
2016-03-10 14:30 |
Tokyo |
The University of Electro-Communications |
A Multiplier Architecture for Finite Field of 254bit-Prime Square Order Based on Pipelined 32bit Montgomery Multipliers Yusuke Nagahama, Daisuke Fujimoto, Tsutomu Matsumoto (YNU) IT2015-116 ISEC2015-75 WBS2015-99 |
Bilinear Pairing is a major tool to realize advanced cryptographic functionality such as searchable encryption, aggregat... [more] |
IT2015-116 ISEC2015-75 WBS2015-99 pp.95-100 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-27 16:50 |
Oita |
B-ConPlaza |
Accelerating finite field arithmetic with a suitable word size Aiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri, Ryuichi Harasawa (Nagasaki Univ.) RECONF2014-44 |
In this paper, we implement architecture to speed up $GF(2^m)$ arithmetic in Elliptic Curve Cryptography(ECC) systems as... [more] |
RECONF2014-44 pp.57-61 |
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