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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2015-12-02
16:20		 Nagasaki Nagasaki Kinro Fukushi Kaikan Sleep Control Using Virtual Ground Voltage Detection For Fine-Grain Power Gating
Masaru Kudo, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2015-57 DC2015-53		 This paper describes a sleep control technique using leakage monitor circuit to implement Fine-Grain Power Gating (FGPG)... [more] VLD2015-57 DC2015-53
pp.129-134
IPSJ-SLDM, VLD 2011-05-19
09:55		 Fukuoka Kitakyushu International Conference Center Multi-Stage Power Gating Based on Controlling Values of Logic Gates
Jin Yu, Shinji Kimura (Waseda Univ.) VLD2011-7		 Controlling value based power gating is a fine-grained power gating approach using the controlling values of logic eleme... [more] VLD2011-7
pp.33-38
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