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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 83  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
EMCJ, IEE-EMC, IEE-SPC 2023-05-12
17:20
Okinawa  
(Primary: On-site, Secondary: Online)
Fault Location using Deep Learning for TDR Waveforms in Overhead Distribution Systems with Few Branches
Tohlu Matsushima, Daiki Nagata, Yuki Fukumoto (Kyutech), Takashi Hisakado (Kyoto Univ), Uki Kanenari, Tsuyoshi Iinuma, Yusuke Nishihiro (Kansai Transmission and Distribution, Inc.), Shin Toguchi (DAIHEN Corporation) EMCJ2023-11
Equipment using the TDR method is being developed to accelerate detection of faults in overhead distribution systems.
H... [more]
EMCJ2023-11
pp.25-30
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2022-03-10
10:50
Online Online A Test Generatoin Method to Improve Diagonostic Resolution Based on Fault Sensitization Coverage
Yuya Chida, Toshinori Hosokawa (Nihon Univ.), Koji Yamazaki (Meiji Univ.) CPSY2021-57 DC2021-91
As one of test generation methods to achieve high defect coverage, n-detection test generation methods have been propose... [more] CPSY2021-57 DC2021-91
pp.73-78
ICM 2022-03-04
15:20
Online Online Proposal of network resilience method by linking and complementary use of power information and network information
Ryo Sato, Yuji Shinozaki, Yoshikazu Nakamura, Norihiko Oobayashi, Tomonari Fujimoto (NTT) ICM2021-57
Just as one of the goals of the SDGs is to build resilient infrastructure, the power infrastructure and communication in... [more] ICM2021-57
pp.78-83
R 2021-05-28
15:25
Online Online Software Reliability Analysis Based on Generalized Nonlinear Yule Processes
Siqiao Li, Tadashi Dohi, Hiroyuki Okamura (Hiroshima Univ.) R2021-7
In this note, we consider two specific software reliability models (SRMs) with nonlinear modification, which are categor... [more] R2021-7
pp.35-40
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2021-03-26
11:00
Online Online An Estimation Method of a Defect Types for Suspected Fault Lines in Logical Faulty VLSI Using Neural Networks
Natsuki Ota, Toshinori Hosokawa (Nihon Univ.), Koji Yamazaki (Meiji Univ.), Yukari Yamauchi, Masayuki Arai (Nihon Univ.) CPSY2020-61 DC2020-91
Since fault diagnosis methods for specified fault models might cause misprediction and non-prediction, a fault diagnosis... [more] CPSY2020-61 DC2020-91
pp.67-72
EMCJ, MICT
(Joint)
2021-03-05
16:15
Online Online Simulation of TDR waveform for fault location in overhead distribution line
Fumikazu Kobayashi, Tohlu Matsushima, Yuki Fukumoto (Kyutech), Takashi Hisakado (Kyoto Univ.), Yusuke Kokubo, Shoichi Higashiyama, Yuko Inaoka (Kansai Transmission and Distribution, Inc.), Yusuke Sasaki (DAIHEN Corporation) EMCJ2020-82
It has been investigated that time domain reflectometry method was applied to an overhead distribution line to locate a ... [more] EMCJ2020-82
pp.51-56
ICD, HWS [detail] 2020-10-26
13:00
Online Online Design of Efficient AES Hardware with Immediately Fault Detection Capability
Yusuke Yagyu, Rei Ueno, Naofumi Homma (Tohoku Univ.) HWS2020-31 ICD2020-20
This paper presents an efficient AES encryption/decryption hardware architecture
with a fault detection scheme.
The pr... [more]
HWS2020-31 ICD2020-20
pp.36-41
HWS, VLD [detail] 2020-03-05
10:30
Okinawa Okinawa Ken Seinen Kaikan
(Cancelled but technical report was issued)
Motor Current Signature Analysis Based On-Line Fault Detection of DC Motor
Naoki Osako (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM), Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2019-111 HWS2019-84
This article presents a method for online detection of DC motors' fault based on current signature analysis.
While cu... [more]
VLD2019-111 HWS2019-84
pp.101-106
HWS, VLD [detail] 2020-03-06
14:30
Okinawa Okinawa Ken Seinen Kaikan
(Cancelled but technical report was issued)
A Test Generation Method for Resistive Open Faults Using Partial MAX-SAT solver
Hiroshi Yamazaki, Yuta Ishiyama, Tatsuma Matsuta, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) VLD2019-131 HWS2019-104
In VLSI testing, stuck-at fault model and transition fault model have been widely used. However, with advance of semicon... [more] VLD2019-131 HWS2019-104
pp.215-220
DC 2020-02-26
14:10
Tokyo   A Don’t Care Identification-Filling Co-Optimization Method for Low Power Testing Using Partial Max-SAT
Kenichiro Misawa, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ), Masayoshi Yoshimura (Kyouto Sangyo Univ), Masayuki Arai (Nihon Univ) DC2019-92
Recently, in at-speed scan testing, excessive capture power dissipation is a serious problem. Low capture power test gen... [more] DC2019-92
pp.37-42
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-14
16:35
Ehime Ehime Prefecture Gender Equality Center Test Generation for Hardware Trojan Detection Using the Delay Difference of a Pair of Independent Paths
Suguru Rikino, Yushiro Hiramoto, Satoshi Ohtake (Oita Univ.) VLD2019-46 DC2019-70
Hardware Trojan detection is important to ensure security of LSIs.
If a hardware Trojan is inserted in a signal line o... [more]
VLD2019-46 DC2019-70
pp.151-155
EMCJ 2019-07-18
13:35
Tokyo Kikai-Shinko-Kaikan Bldg. Fundamental study on influence of intentional electromagnetic interference on IC communication
Hikaru Nishiyama, Takumi Okamoto, Daisuke Fujimoto, Yuichi Hayashi (NAIST) EMCJ2019-23
Low-Power Intentional Electromagnetic Interference (IEMI) has been reported, which causes malfunction without damaging t... [more] EMCJ2019-23
pp.29-33
R 2019-06-14
15:30
Tokyo Kikai-Shinko-Kaikan Bldg. Identification comparison of software fault-prone modules using nonlinear logistic regression models
Kazunari Yamanaka, Tadashi Dohi, Hiroyuki Okamura (Hiroshima U.) R2019-12
In this article, we compare several non-linear logistic regression models used in a fault-prone
identification problem... [more]
R2019-12
pp.19-24
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2019-03-18
09:00
Kagoshima Nishinoomote City Hall (Tanega-shima) A Test Generation Method for Resistive Open Faults Using MAX-SAT Problem
Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) CPSY2018-117 DC2018-99
In VLSI testing, stuck-at fault model and transition fault model have been widely used. However, with advance of semicon... [more] CPSY2018-117 DC2018-99
pp.315-320
EE, IEE-SPC
(Joint)
2019-03-07
14:40
Okinawa   Evaluation of Detection Accuracy based on The Influence of Power Distortion in System Protection Relay
Rukai Sun, Nishimura Kazunori (Hiroshima Ins. Tech.), Yonemoto Kazuhiro, Hiroi Hideyuki, Tsuchida Takashi (KDK) EE2018-58
In recent years, ground fault accidents such as electric shock and fire have occurred frequently due to the rapid rise i... [more] EE2018-58
pp.1-6
DC 2019-02-27
15:10
Tokyo Kikai-Shinko-Kaikan Bldg. State Encoding with Stochastic Numbers for Transient Fault Tolerant Linear Finite State Machines
Yuki Maeda, Hideyuki Ichihara, Tsuyoshi Iwagaki, Tomoo Inoue (Hiroshima City Univ.) DC2018-81
Stochastic Computing (SC) has attractive characteristics, compared with deterministic (or general binary) computing, suc... [more] DC2018-81
pp.61-66
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2018-12-06
13:00
Hiroshima Satellite Campus Hiroshima Test Time Reduction by Separating Delay Lines in Boundary Scan Circuit with Embedded TDC
Satoshi Hirai, Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) VLD2018-56 DC2018-42
3D die-stacking technique using TSVs has gained much attention as a new integration method of IC.
However, faulty TSVs ... [more]
VLD2018-56 DC2018-42
pp.119-124
EMCJ, IEE-EMC, IEE-MAG 2018-11-22
15:10
Overseas KAIST [Poster Presentation] Influence of IEMI considering injected signal phase on faulty outputs in a cryptographic module
Mitsuki Takenouchi (Tohoku Univ.), Yu-ichi Hayashi (NAIST), Takaaki Mizuki, Hideaki Sone (Tohoku Univ.) EMCJ2018-79
In a fault injection method based on Intentional Electromagnetic Interference (IEMI) from a power line, the phase of the... [more] EMCJ2018-79
pp.61-62
SS, MSS 2018-01-18
15:45
Hiroshima   Study on Deployment of a Computer Algebra System for Generating Random Test Patterns for Combinational Circuits
Tsutomu Inamoto, Yoshinobu Higami (Ehime Univ.) MSS2017-57 SS2017-44
In this study, the authors display an attempt of deploying a computer algebra system to improve the fault detection rate... [more] MSS2017-57 SS2017-44
pp.59-64
SANE 2017-10-04
13:50
Tokyo Maison franco - japonaise (Tokyo) Fault Detection in the Curah Lengkong at Mt Semeru, Indonesia -- Topographic and Ground Penetrating Radar Evidences --
Christopher Gomez (Kobe Univ.), Franck Lavigne (Sorbonne Univ.), Danang Sri Hadmoko (Univ. Gadja Madah) SANE2017-44
The Semeru Volcano is a stratovolcano in East Java in Indonesia, that is
well known for its regular phreatomagmatic eru... [more]
SANE2017-44
pp.7-10
 Results 1 - 20 of 83  /  [Next]  
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