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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]		 2017-11-07
09:50		 Kumamoto Kumamoto-Kenminkouryukan Parea Performance Evaluation Three Dimensional FPGA Architecture with Face-down Stacking
Keishiro Akashi, Motoki Amagasaki, Qian Zhao, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ) RECONF2017-42		 In recent years,Three-dimensional (3D) field-programmable gate arrays(FPGAs) are expected to offer higher logic density ... [more] RECONF2017-42
pp.31-36
VLD, DC, CPSY, RECONF, CPM, ICD, IE
(Joint) [detail]		 2016-11-29
10:55		 Osaka Ritsumeikan University, Osaka Ibaraki Campus Development of power estimation tool for three dimensional FPGA
Masato Ikebe, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2016-46		 Three-dimensional (3D) stacking technology is attractive for providing another way to improve the performance of the lar... [more] RECONF2016-46
pp.35-40
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