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Committee Date Time Place Paper Title / Authors Abstract Paper #
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2021-03-26
Online Online Prototyping of A Packet Aggregation/Disaggregation Router with FPGA
Shiro Takayama, Naoki Fujieda, Michihiro Aoki (Aichi Inst. of Tech.) CPSY2020-58 DC2020-88
Network traffic volume is increasing due to the growth of IoT services. In particular, increase of short packets may aff... [more] CPSY2020-58 DC2020-88
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2021-03-26
Online Online Unsupervised Recycled FPGA Detection Using Direct Density Ratio Estimation Based on Self-referencing
Yuya Isaka (KGU), Michihiro Shintani (NAIST), Foisal Ahmed (PU), Michiko Inoue (NAIST) CPSY2020-60 DC2020-90
It is well known that the performance of field-programmable gate-array (FPGA) degrades over time due to their usage. Sev... [more] CPSY2020-60 DC2020-90
SIS 2021-03-04
Online Online Hardware Implementation of Object Recognition Neural Network using Depth Images
Yuma Yoshimoto (Kyutech/JSPS Research Fellow), Hakaru Tamukoh (Kyutech/Research Center for Neuromorphic AI Hardware) SIS2020-47
In this study, we propose an object recognition neural network using depth images, implemented on an FPGA for service ro... [more] SIS2020-47
Online Online A study of disaster prevention application on wide-area multihop network systems -- For application of disaster prevention --
Akira Tanaka (NIT, Tokyo College), Mitsuru Maruyama (KAIT), Shigeo Urushidani (NII) NS2020-173
We design real-time information sharing communication platform consists of multihop-network linked small board computers... [more] NS2020-173
HWS, VLD [detail] 2021-03-04
Online Online Experiments of Data Authenticity Verification in Multi-Node IoT Systems Using Elliptic Curve Digital Signature Chips
Yuya Takahashi, Takuya Matsumaru, Kazuki Monta (Kobe Univ.), Toshihiro Sato, Takaaki Okidono (ECSEC Lab), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) VLD2020-85 HWS2020-60
Practicality of IoT systems requires the efficiency and speed of crypto processing in edge nodes and remote servers. So ... [more] VLD2020-85 HWS2020-60
Online Online FPGA implementation and evaluation of miniaturization and high-speed processing method for FFT
Hiroshi Kishimoto, Katsumi Takahashi, Shiraishi Masashi (MELCO) SANE2020-69
(To be available after the conference date) [more] SANE2020-69
DC 2021-02-05
Online Online A Study on a Method of Measuring Process Variations Considering the Effect of Wire Delay on FPGA
Shingo Tsutsumi, Yukiya Miura (Tokyo Metropolitan Univ.) DC2020-69
FPGAs are integrated circuits that can be implemented arbitrary logic functions. In FPGAs, it is important to measure pr... [more] DC2020-69
CAS, ICTSSL 2021-01-28
Online Online A Hardware Implementation of Neural Networks using HDLRuby, a Ruby-based Hardware Description Language
Ryota Sakai, Yuki Maehara, Lovic Gauthier (NITAC) CAS2020-53 ICTSSL2020-38
In the recent years, FPGAs have been attracting attention as neural network accelerators for their superior performance ... [more] CAS2020-53 ICTSSL2020-38
CAS, ICTSSL 2021-01-28
Online Online Study of a Hardware Implementation of a Long Short-Term Memory with HDLRuby
Yuki Maehara, Ryota Sakai, Lovic Gauthier (NITAC) CAS2020-54 ICTSSL2020-39
In the recent years, many global companies have attempted to use FPGA for implementing applications in the field of AI s... [more] CAS2020-54 ICTSSL2020-39
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-25
Online Online Throughput improvement of Responsive Link with High Speed Transceiver in FPGA
Masahiko Takahashi, Yamasaki Nobuyuki (Keio Univ.) VLD2020-46 CPSY2020-29 RECONF2020-65
In a real-time system, there is a requirement that not only the accuracy of the processing result but also the execution... [more] VLD2020-46 CPSY2020-29 RECONF2020-65
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-25
Online Online Efficient Attention Mechanism by Softmax Function with Trained Coefficient
Kaito Hirota (UT), O'uchi Shinichi (AIST), Fujita Masahiro (UT) VLD2020-48 CPSY2020-31 RECONF2020-67
BERT is a neural network model which has accomplished state-of-the-art performance on eleven natural language processing... [more] VLD2020-48 CPSY2020-31 RECONF2020-67
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-25
Online Online A High-speed Convolutional Neural Network Accelerator for an Adaptive Resolution on an FPGA
Koki Sayama, Akira Jinguji, Naoto Soga, Hiroki Nakahara (Tokyo Tech) VLD2020-49 CPSY2020-32 RECONF2020-68
In recent years, CNN has been used for various tasks in the field of computer vision and has achievedexcellent performan... [more] VLD2020-49 CPSY2020-32 RECONF2020-68
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
Online Online Acceleration of Database Query Processing Using FPGA
Hirohiko Ozaku (UEC), Masato Yoshimi (TIS), Celimuge Wu, Tsutomu Yoshinaga (UEC) VLD2020-55 CPSY2020-38 RECONF2020-74
A bottleneck of Big data analysis is a time to transfer large amount of data to the main memory from the storage. The da... [more] VLD2020-55 CPSY2020-38 RECONF2020-74
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
Online Online FPGA Implementation of Semantic Segmentation on LWIR Images for Autonomous Robot
Yuichiro Niwa (ATLA), Taiki Fujii (eSOL) VLD2020-57 CPSY2020-40 RECONF2020-76
Recently, deep learning of images has made remarkable progress, and its results are being applied to the automatic
reco... [more]
VLD2020-57 CPSY2020-40 RECONF2020-76
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
Online Online VLD2020-58 CPSY2020-41 RECONF2020-77 (To be available after the conference date) [more] VLD2020-58 CPSY2020-41 RECONF2020-77
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
Online Online Network Intrusion Detection System based on Hybrid FPGA/GPU Pattern Matching
Shunta Kikuchi (AIST/The Univ. of Tokyo), Tsutomu Ikegami, Akram ben Ahmed (AIST), Tomohiro Kudoh (The Univ. of Tokyo/AIST), Ryohei Kobayashi, Norihisa Fujita, Taisuke Boku (Univ. of Tsukuba) VLD2020-59 CPSY2020-42 RECONF2020-78
These days, Heterogeneous computing is becoming common. In this study, we made an NIDS (Network Intrusion Detection Syst... [more] VLD2020-59 CPSY2020-42 RECONF2020-78
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
Online Online
Hiroaki Suzuki (Keio Univ), Wataru Takahashi (NEC), Kazutoshi Wakabayashi (Tokyo Univ), Hideharu Amano (Keio Univ) VLD2020-60 CPSY2020-43 RECONF2020-79
(To be available after the conference date) [more] VLD2020-60 CPSY2020-43 RECONF2020-79
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
Online Online SLM based FPGA-IP soft core
Yuya Nakazato, Hiroaki Koga (Kumamoto Univ.), Zhao Qian (KIT), Motoki Amagasaki, Morihiro Kuga, Masahiro Iida (Kumamoto Univ.) VLD2020-61 CPSY2020-44 RECONF2020-80
In the recent edge computing infrastructure, MEC (Multi-access Edge Computing) devices is considered to reduce the load ... [more] VLD2020-61 CPSY2020-44 RECONF2020-80
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
Online Online Automated architecture exploration on Scala-based hardware development environment
Ryota Yamashita, Daichi Teruya, Hironori Nakajo (TUAT) VLD2020-62 CPSY2020-45 RECONF2020-81
In recent years, reconfigurable architectures such as FPGAs have been attracting more and more attention.
Design Space... [more]
VLD2020-62 CPSY2020-45 RECONF2020-81
Online Online Distributed vRouter Acceleration using FPGA on IA Server
Kazuki Hyoudou, Takashi Shimizu, Ryo Miyashita (Fujitsu Labs.), Hiroshi Murakawa (Fujitsu KCN), Tomohiro Ishihara (Fujitsu Labs.) NS2020-84
Recently, the virtualization of network functions, or NFV, becomes common. And libraries to implement high performance d... [more] NS2020-84
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