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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 68  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2023-11-16
10:20
Kumamoto Civic Auditorium Sears Home Yume Hall
(Primary: On-site, Secondary: Online)
Design and Error-tolerance of FeFET-based CiM for Hyperdimensional Computing
Chihiro Matsui, Eitaro Kobayashi, Naoko Misawa, Kasidit Toprasertpong, Shinichi Takagi, Ken Takeuchi (Univ. of Tokyo) VLD2023-48 ICD2023-56 DC2023-55 RECONF2023-51
A high-speed massively parallel operation for learning and inference in Hyperdimensional Computing (HDC) using voltage-s... [more] VLD2023-48 ICD2023-56 DC2023-55 RECONF2023-51
pp.99-100
SANE, SAT
(Joint)
2023-03-02
10:30
Okinawa
(Primary: On-site, Secondary: Online)
Evaluation of the communication quality with Forward Error Correction and Delay Tolerant Networking
Hiromitsu Komatsu, Kai Suzuki (Sony CSL), Kiyohisa Suzuki, Yu Morinaga (JAXA) SAT2022-58
Non-terrestrial networks (NTN) using satellites and stratospheric platforms are required to expand Internet coverage and... [more] SAT2022-58
pp.17-21
IPSJ-SLDM, RECONF, VLD [detail] 2023-01-24
10:30
Kanagawa Raiosha, Hiyoshi Campus, Keio University
(Primary: On-site, Secondary: Online)
Measurement results of soft error tolerance of LPDDR4 SDRAM and GDDR5 SDRAM
Motoki Kamibayashi, Kazutoshi Kobayashi (Kyoto Inst. of Tech.), Masanori Hashimoto (Kyoto Univ.) VLD2022-65 RECONF2022-88
In recent years, as the memory capacity of computer systems has increased,the reliability of the system has decreased.So... [more] VLD2022-65 RECONF2022-88
pp.34-39
DC 2022-12-16
14:10
Yamaguchi
(Primary: On-site, Secondary: Online)
Stuck-at Fault Tolerance in DNN Using Outliers and Sampling
Tomohiro Ishii, Kazuteru Namba (Chiba Univ.) DC2022-75
The development of artificial intelligence and the expansion of big data have led to the implementation of neural networ... [more] DC2022-75
pp.17-20
OCS, PN, NS
(Joint)
2022-06-10
13:25
Online Online Decoding Complexity Reduction of Forward Error Correction by Channel-polarized Multilevel Coding
Takeshi Kakizaki, Masanori Nakamura, Fukutaro Hamaoka, Yoshiaki Kisaka (NTT) OCS2022-11
In a digital coherent optical communication system, it is necessary to design a forward error correction (FEC) and modul... [more] OCS2022-11
pp.6-11
NS, IN
(Joint)
2022-03-11
16:10
Online Online An Efficient Environment for Boost Effect of Inquiry-Based Communication Protocol with Error Correction
Mitsuharu Naito, Yoshiaki Kitaguchi, Katsunori Yamaoka (Tokyo Tech) IN2021-53
When the downlink bandwidth is larger than the uplink bandwidth, an inquiry-based communication protocol has been propos... [more] IN2021-53
pp.133-138
VLD, DC, RECONF, ICD, IPSJ-SLDM
(Joint) [detail]
2021-12-01
09:20
Online Online Soft Errors on Flip-flops Depending on Circuit and Layout Structures Estimated by TCAD Simulations
Moeka Kotani, Ryuichi Nakajima (KIT), Kazuya Ioki (ROHM), Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2021-17 ICD2021-27 DC2021-23 RECONF2021-25
We compare the soft error tolerance of conventional flip-flops (FFs) and the proposed radiation-hard FF with small area,... [more] VLD2021-17 ICD2021-27 DC2021-23 RECONF2021-25
pp.1-6
DC, CPSY, IPSJ-ARC [detail] 2021-10-11
16:00
Online Online Edge triggered D Flip-Flop using complementarity of DICE
Noriki Matsuura, Kazuteru Namba (Chiba Univ.) CPSY2021-15 DC2021-15
In recent years, the probability of soft errors has been increasing due to the miniaturization, high integration, and lo... [more] CPSY2021-15 DC2021-15
pp.19-24
IN, NS
(Joint)
2021-03-05
15:30
Online Online Error Correcting for Downlink of the Protocol for Reticent Sender Cooperated with Aggressively Speaking Receiver
Mitsuharu Naito, Yuki Ito, Yoshiaki Kitaguchi, Katsunori Yamaoka (TIT) IN2020-96
We have proposed two error correcting methods for inquiry-based communication protocol. One is list-reconstructed method... [more] IN2020-96
pp.250-255
IN, NS
(Joint)
2021-03-05
15:50
Online Online Optimal Configuration of Communication Protocol by Diverting Backward Links with Uplink 1-Bit Error Tolerance
Yuki Ito, Yoshiaki Kitaguchi, Katsunori Yamaoka (Tokyo Tech) IN2020-97
The efficient communication protocol of the asymmetric channel which has wider bandwidth of downlink than that of uplink... [more] IN2020-97
pp.256-261
HWS, VLD [detail] 2021-03-03
10:25
Online Online Evaluation on Approximate Multiplier for CNN Calculation
Yuechuan Zhang, Masahiro Fujita, Takashi Matsumoto (UTokyo) VLD2020-68 HWS2020-43
Improving the accuracy of a convolutional neural network (CNN) typically requires larger hardware with more energy consu... [more] VLD2020-68 HWS2020-43
pp.7-12
DC 2021-02-05
11:35
Online Online A Novel High Performance Scan-Test-Aware Hardened Latch Design
Ruijun Ma, Stefan Holst, Xiaoqing Wen (KIT), Aibin Yan (AHU), Hui Xu (AUST) DC2020-71
As modern technology nodes become more and more susceptible to soft-errors, many radiation hardened latch designs have b... [more] DC2020-71
pp.12-17
SAT, RCS
(Joint)
2020-08-21
10:55
Online Online [Encouragement Talk] A Fundamental Study Toward the Software Defined Satellite
Shigenori Tani, Yasutaka Yamashita, Michiya Hayama, Masatake Hangai, Hiroshi Aruga (Mitsubishi Electric) SAT2020-20
The software defined satellite (SDS) improves frequency utilization to control resources such as time, frequency, and sp... [more] SAT2020-20
pp.53-57
NS, IN
(Joint)
2020-03-06
11:40
Okinawa Royal Hotel Okinawa Zanpa-Misaki
(Cancelled but technical report was issued)
1 Bit Error Tolerance Considering Delay of the Protocol for Reticent Sender Cooperated with Aggressively Speaking Receiver
Yuki Ito, Yoshiaki Kitaguchi, Katsunori Yamaoka (Tokyo Tech) IN2019-123
We have proposed two methods of 1 bit error tolerance of the protocol
for reticent sender cooperated with aggressivel... [more]
IN2019-123
pp.267-272
DC 2020-02-26
16:35
Tokyo   Soft Error Tolerance of Power-Supply-Noise Hardened Latches
Yuya Kinoshita, Yukiya Miura (Tokyo Metropolitan Univ.) DC2019-97
In recent years, with the scaling down and low-power operation of VLSI circuits, reliability degradation due to soft err... [more] DC2019-97
pp.67-72
SAT, SANE
(Joint)
2020-02-20
13:50
Okinawa   Soft error mitigation using CNN DAE for onboard digital payload
Shigenori Tani, Yasutaka Yamashita, Shigeru Uchida, Hiroshi Aruga (Mitsubishi Electric) SAT2019-81
An onboard digital payload enables communication and observation satellites to improve operation flexibility by changing... [more] SAT2019-81
pp.69-74
SeMI, RCS, NS, SR, RCC
(Joint)
2019-07-12
13:15
Osaka I-Site Nanba(Osaka) A study on cross-layer redundancy of predictive control and error correction coding for wireless feedback control
Kohei Kasai, Kentaro Kobayashi, Hiraku Okada, Masaaki Katayama (Nagoya Univ.) RCC2019-51
In wireless feedback control systems, control quality deteriorates due to wireless channel error and packet loss. Theref... [more] RCC2019-51
pp.189-193
DC 2019-02-27
15:10
Tokyo Kikai-Shinko-Kaikan Bldg. State Encoding with Stochastic Numbers for Transient Fault Tolerant Linear Finite State Machines
Yuki Maeda, Hideyuki Ichihara, Tsuyoshi Iwagaki, Tomoo Inoue (Hiroshima City Univ.) DC2018-81
Stochastic Computing (SC) has attractive characteristics, compared with deterministic (or general binary) computing, suc... [more] DC2018-81
pp.61-66
VLD, HWS
(Joint)
2018-02-28
16:30
Okinawa Okinawa Seinen Kaikan Reconfiguration for Fault Tolerant FPGA Considering Incremental Multiple Faults
Cheng Ma, Mineo Kaneko (JAIST) VLD2017-101
The report treats the reconfiguration-based fault-tolerance for FPGA applications, and proposes a method of finding a ch... [more] VLD2017-101
pp.73-78
VLD, HWS
(Joint)
2018-02-28
16:55
Okinawa Okinawa Seinen Kaikan Reliability Evaluation of Mixed Error Correction Scheme for Soft-Error Tolerant Datapaths
Junghoon Oh, Mineo Kaneko (JAIST) VLD2017-102
Among several problems with miniaturization of LSIs, soft-errors are one of serious problems to make reliability worse. ... [more] VLD2017-102
pp.79-84
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