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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, SDM | 2014-08-04 10:50 |
Hokkaido | Hokkaido Univ., Multimedia Education Bldg. | A 28nm High-k/MG Heterogeneous Multi-Core Mobile Application Processor with 2GHz Cores and Low-Power 1GHz Cores Mitsuhiko Igarashi, Toshifumi Uemura, Ryo Mori, Hiroshi Kishibe, Masaaki Taniguchi, Kohei Wakahara, Toshiharu Saito, Masaki Fujigaya, Kazuki Fukuoka, Koji Nii, Takeshi Kataoka, Toshihiro Hattori (Renesas Electronics)  SDM2014-64 ICD2014-33 |
This paper presents power management and low power techniques of our heterogeneous quad/octa-core mobile application pro... [more] | SDM2014-64 ICD2014-33 pp.11-16 |
| ICD | 2014-01-28 15:00 |
Kyoto | Kyoto Univ. Tokeidai Kinenkan | [Poster Presentation]
An Autonomous Control Cache Memory for Dynamic Variation Tolerance with Bit-Enhancing Memory Yuta Kimi, Yohei Nakata, Shunsuke Okumura, Jinwook Jung, Takuya Sawada, Taku Toshikawa (Kobe Univ.), Makoto Nagata (Kobe Univ./JST CREST), Hirofumi Nakano, Makoto Yabuuchi, Hidehiro Fujiwara, Koji Nii, Hiroyuki Kawai (Renesas Electronics Corporation), Hiroshi Kawaguchi (Kobe Univ.), Masahiko Yoshimoto (Kobe Univ./JST CREST) ICD2013-125 |
Processor reliability is getting more critical issue since technology scaling degrades processor tolerance against power... [more] | ICD2013-125 p.59 |
| COMP, IPSJ-AL | 2013-05-18 16:30 |
Hokkaido | Otaru University of Commerce | Label Size Maximization for Rotating Maps Yusuke Yokosuka, Keiko Imai (Chuo Univ.) COMP2013-18 |
Map labeling is a problem of placing labels at the corresponding graphical features in a map. There are two optimizati... [more] |
COMP2013-18 pp.157-162 |
| IPSJ-SLDM, VLD | 2012-05-30 14:30 |
Fukuoka | Kitakyushu International Conference Center | Task Allocation Optimization Method Using SA Method to Automatically Set Starting Temperature for Multi-Processor System Yuichiro Yanabu, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ.) VLD2012-1 |
Recently, Multi-Processor System is widely used for huge applications such as image and multimedia processing. To reduce... [more] | VLD2012-1 pp.1-6 |
| VLD | 2012-03-07 13:20 |
Oita | B-con Plaza | Power reduction of memory circuit and DVFS technique in Dynamic Reconfigurable Processor Yuki Hayakawa, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2011-138 |
This paper describes a DVFS technique to reduce energy dissipation of Dynamically Reconfigurable Processors(DRP). DRP’s ... [more] | VLD2011-138 pp.109-114 |
| NS | 2012-01-26 13:20 |
Okinawa | Ryukyu University | Load Reduction of Dynamic Scaling on Distributed Session Control Server Eriko Iwasa, Michio Irie, Masashi Kaneko, Takeshi Fukumoto, Masami Iio, Kiyoshi Ueda (NTT) NS2011-156 |
In this paper, we discuss about the load reduction of dynamic scaling on N-Active type distributed session control serve... [more] | NS2011-156 pp.65-70 |
| NLP | 2011-03-11 16:10 |
Tokyo | Tokyo University of Science | Theoretical analysis on periodicity and randomness of time series generated from complex netowrks Yuta Haraguchi, Yutaka Shimada, Tohru Ikeguchi, Takaomi Shigehara (Saitama Univ.) NLP2010-195 |
A bridge between the complex network theory and the nonlinear dynamical system theory has been discussed to establish a ... [more] | NLP2010-195 pp.181-186 |
| ICD, SDM | 2010-08-26 13:50 |
Hokkaido | Sapporo Center for Gender Equality | Design Constraint of Fine Grain Supply Voltage Control LSI
-- In the case of DVFS Technique -- Atsuki Inoue (Fujitsu Lab. Ltd.) SDM2010-133 ICD2010-48 |
Supply voltage control technique for realizing low power LSI is utilized not only for general purpose processors but als... [more] | SDM2010-133 ICD2010-48 pp.51-54 |
| ED, SDM | 2010-07-02 15:45 |
Tokyo | Tokyo Inst. of Tech. Ookayama Campus | Study on Impurity Distribution Dependence of Electron-Dynamics in Vertical MOSFET Masakazu Muraguchi, Tetsuo Endoh (Tohoku Univ./JST) ED2010-120 SDM2010-121 |
In this study, we focus on the electron propagation in the V-MOSFET under the different impurity distribution of the pil... [more] | ED2010-120 SDM2010-121 pp.309-313 |
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-27 09:00 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Architecture of a Low-Power FPGA Based on Self-Adaptive Voltage Control Shota Ishihara, Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) VLD2009-84 CPSY2009-66 RECONF2009-69 |
This paper presents a low-power FPGA with multiple supply voltages. In the proposed FPGA, the supply voltage of each log... [more] | VLD2009-84 CPSY2009-66 RECONF2009-69 pp.95-99 |
| ICD | 2009-12-14 10:50 |
Shizuoka | Shizuoka University (Hamamatsu) | [Invited Talk]
Experimental Evaluation Technique for Power Supply Noise and Logical Operation Failure Mitsuya Fukazawa (Renesas Technology Corp.), Makoto Nagata (Kobe Univ.) ICD2009-77 |
Logical operations in CMOS digital integration are highly prone to fail as the amount of power supply (PS) drop approach... [more] | ICD2009-77 pp.7-12 |
| NLP | 2009-08-04 10:20 |
Kochi | Multi-Scaling of Gray Level Image and its Dynamic Image Segmentation Using Discrete-time Dynamical Systems Ken'ichi Fujimoto, Mio Musashi, Tetsuya Yoshinaga (Univ. of Tokushima.) NLP2009-53 |
The authors have proposed a discrete-time coupled system consisting of chaotic neurons and a global inhibitor. We demons... [more] | NLP2009-53 pp.49-52 |
|
| NLP | 2009-03-11 10:10 |
Kyoto | N-Population Replicator Dynamics with Player's Migration among Populations Chihiro Yoshihara, Takafumi Kanazawa, Toshimitsu Ushio (Osaka Univ.) NLP2008-164 |
Replicator dynamics is a model of changes of shares of strategies in a population which consists of a large number of pl... [more] | NLP2008-164 pp.77-80 |
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| NLP | 2009-02-28 15:55 |
Kanagawa | Stochastic Resonance Like Phenomena in Chaotic Neural Network Naoki Kanisawa, Toshiya Iwai (Nihon Univ.) NLP2008-147 |
Dynamical properties of an association of auto-associative chaotic neural network model with dynamical noise are numeric... [more] | NLP2008-147 pp.89-94 |
|
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 16:05 |
Fukuoka | Kitakyushu Science and Research Park | Insertion-Point Selection of Canary FF for Timing Error Prediction Yuji Kunitake (Kyushu Univ.), Toshinori Sato (Fukuoka Univ.), Seiichiro Yamaguchi, Hiroto Yasuura (Kyushu Univ.) |
The deep submicron semiconductor technologies increase parameter ariations. The increase in parameter variations require... [more] | VLD2008-74 DC2008-42 pp.85-89 |
| ICD, IPSJ-ARC | 2008-05-14 16:00 |
Tokyo | Considering Performance and Area Overhead in DVS System Utilizing Input Variations Yuji Kunitake (Kyushu U.), Toshinori Sato (Fukuoka U.), Hiroto Yasuura (Kyushu U.) |
The deep submicron semiconductor technologies increase parameter variations and thus the processor design becomes more d... [more] | ICD2008-34 pp.93-98 |
|
| SP | 2008-03-21 11:00 |
Tokyo | Univ. Tokyo | Acoustic features contributing to gender perception in continuously uttered speech signals Takeshi Shibata, Masato Akagi (JAIST) SP2007-206 |
The aim of this study is to clarify relationships between acoustic features in contributing to gender perception of co... [more] |
SP2007-206 pp.117-122 |
| VLD, ICD | 2008-03-06 16:35 |
Okinawa | TiRuRu | Comparison of Power consumption between dynamic voltage scheme and multi-supply voltage scheme for system LSI Satoshi Hanami, Shigeyoshi Watanabe (Shonan Inst. of Tech.) VLD2007-155 ICD2007-178 |
Reduction of power dissipation caused by dynamic current, gate leakage current, and subthreshold leakage current of mult... [more] | VLD2007-155 ICD2007-178 pp.67-72 |
| VLD, ICD | 2008-03-07 10:05 |
Okinawa | TiRuRu | A Self-timed Processor with Dynamic Voltage Scaling Taku Sogabe, Makoto Ikeda, Kunihiro Asada (Univ. of Tokyo) VLD2007-158 ICD2007-181 |
As PVT variations get larger, synchronous circuits are getting less reliable and timing margins are getting larger. Self... [more] | VLD2007-158 ICD2007-181 pp.13-18 |
| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-21 15:45 |
Fukuoka | Kitakyushu International Conference Center | Architecture Exploration Method for Low-Power Dynamically Reconfigurable Processors Yohei Hasegawa, Satoshi Tsutsumi, Vasutan Tunbungheng, Hideharu Amano (Keio Univ.) RECONF2007-40 |
In this paper, we propose a design and evaluation environment for exploring the configurable dynamically reconfigurable ... [more] | RECONF2007-40 pp.25-30 |
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