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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, SDM | 2014-08-04 10:50 |
Hokkaido | Hokkaido Univ., Multimedia Education Bldg. | A 28nm High-k/MG Heterogeneous Multi-Core Mobile Application Processor with 2GHz Cores and Low-Power 1GHz Cores Mitsuhiko Igarashi, Toshifumi Uemura, Ryo Mori, Hiroshi Kishibe, Masaaki Taniguchi, Kohei Wakahara, Toshiharu Saito, Masaki Fujigaya, Kazuki Fukuoka, Koji Nii, Takeshi Kataoka, Toshihiro Hattori (Renesas Electronics)  SDM2014-64 ICD2014-33 |
This paper presents power management and low power techniques of our heterogeneous quad/octa-core mobile application pro... [more] | SDM2014-64 ICD2014-33 pp.11-16 |
| IPSJ-SLDM, VLD | 2012-05-30 14:30 |
Fukuoka | Kitakyushu International Conference Center | Task Allocation Optimization Method Using SA Method to Automatically Set Starting Temperature for Multi-Processor System Yuichiro Yanabu, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ.) VLD2012-1 |
Recently, Multi-Processor System is widely used for huge applications such as image and multimedia processing. To reduce... [more] | VLD2012-1 pp.1-6 |
| VLD | 2012-03-07 13:20 |
Oita | B-con Plaza | Power reduction of memory circuit and DVFS technique in Dynamic Reconfigurable Processor Yuki Hayakawa, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2011-138 |
This paper describes a DVFS technique to reduce energy dissipation of Dynamically Reconfigurable Processors(DRP). DRP’s ... [more] | VLD2011-138 pp.109-114 |
| ICD, SDM | 2010-08-26 13:50 |
Hokkaido | Sapporo Center for Gender Equality | Design Constraint of Fine Grain Supply Voltage Control LSI
-- In the case of DVFS Technique -- Atsuki Inoue (Fujitsu Lab. Ltd.) SDM2010-133 ICD2010-48 |
Supply voltage control technique for realizing low power LSI is utilized not only for general purpose processors but als... [more] | SDM2010-133 ICD2010-48 pp.51-54 |
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-27 09:00 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Architecture of a Low-Power FPGA Based on Self-Adaptive Voltage Control Shota Ishihara, Zhengfan Xia, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) VLD2009-84 CPSY2009-66 RECONF2009-69 |
This paper presents a low-power FPGA with multiple supply voltages. In the proposed FPGA, the supply voltage of each log... [more] | VLD2009-84 CPSY2009-66 RECONF2009-69 pp.95-99 |
| ICD | 2009-12-14 10:50 |
Shizuoka | Shizuoka University (Hamamatsu) | [Invited Talk]
Experimental Evaluation Technique for Power Supply Noise and Logical Operation Failure Mitsuya Fukazawa (Renesas Technology Corp.), Makoto Nagata (Kobe Univ.) ICD2009-77 |
Logical operations in CMOS digital integration are highly prone to fail as the amount of power supply (PS) drop approach... [more] | ICD2009-77 pp.7-12 |
| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-21 15:45 |
Fukuoka | Kitakyushu International Conference Center | Architecture Exploration Method for Low-Power Dynamically Reconfigurable Processors Yohei Hasegawa, Satoshi Tsutsumi, Vasutan Tunbungheng, Hideharu Amano (Keio Univ.) RECONF2007-40 |
In this paper, we propose a design and evaluation environment for exploring the configurable dynamically reconfigurable ... [more] | RECONF2007-40 pp.25-30 |
| ICD, SDM | 2007-08-23 12:50 |
Hokkaido | Kitami Institute of Technology | [Special Invited Talk]
Past and Future of Dynamic Voltage Scaling Hiroyuki Mizuno (Hitachi) SDM2007-148 ICD2007-76 |
Effectiveness and issue for Dynamic Voltage Scaling (DVS) have been described. Both dynamic and leakage power reduction ... [more] | SDM2007-148 ICD2007-76 pp.41-46 |
| ICD, SDM | 2007-08-24 08:55 |
Hokkaido | Kitami Institute of Technology | Fine-Grained In-Circuit Continuous-Time Probing Technique of Dynamic Supply Variation in SoCs Mitsuya Fukazawa, Tetsuro Matsuno, Toshifumi Uemura (Kobe Univ.), Rei Akiyama (Renesas Design), Tetsuya Kagemoto, Hiroshi Makino, Hidehiro Takata (Renesas Technology), Makoto Nagata (Kobe Univ.) SDM2007-156 ICD2007-84 |
Fine-grained built-in probing circuits are distributed at 120 locations on the SoC to allow continuous-time monitoring o... [more] | SDM2007-156 ICD2007-84 pp.85-90 |
| ICD, ITE-IST | 2007-07-26 17:05 |
Hyogo | Low power consumption of H.264/AVC decoder with dynamic voltage and frequency scaling Yoshinori Sakata, Kentaro Kawakami, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2007-52 |
We propose an elastic pipeline architecture that can apply dynamic voltage scaling (DVS) to a dedicated hardware, and ap... [more] | ICD2007-52 pp.89-94 |
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| IE, SIP, ICD, IPSJ-SLDM | 2004-10-21 13:00 |
Yamagata | Power-Minimum Frequency/Voltage Cooperative Management Method in Sub-decimicron Era Kentaro Kawakami, Miwako Kanamori, Yasuhiro Morita, Jun Takemura, Masayuki Miyama (Kanazawa Univ.), Masahiko Yoshimoto (Kobe Univ.) |
To achieve both of a high peak performance and low average power characteristics, frequency-voltage cooperative control ... [more] | SIP2004-82 ICD2004-114 IE2004-58 pp.37-42 |
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