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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| HCGSYMPO (2nd) |
Mie | Sinfonia Technology Hibiki Hall Ise | Recording the Dietary Variety Score (DVS) from LINE BOT and the effects of rivalry between laboratory members Yui Tomine (Keio,/TMIG), Yuta Sugiura (Keio), Satoshi Seino (TMIG) |
When university students live alone for the first time, there are cases they lose the nutrient balance for the cost and ... [more] | ||
| VLD | 2014-03-05 13:00 |
Okinawa | Okinawa Seinen Kaikan | Investigation of thermal monitor for applying to Dynamic Voltage Scaling in SOTB Tatsuya Wada, Kimiyoshi Usami (Shibaura Inst. of Tech)  VLD2013-160 |
SOTB (Silicon on Thin Buried Oxide) transistors can operate at high speed in the ultra-low voltage. However, variation i... [more] | VLD2013-160 pp.141-146 |
| DC, CPSY (Joint) |
2011-07-28 15:15 |
Kagoshima | Proposal for High Efficient DVS Using Adaptive Redundancy of FUs Yukihiro Sasagawa, Jun Yao, Takashi Nakada, Yasuhiko Nakashima (NAIST) DC2011-15 |
Recently, the well-known low power technology DVS(Dynamic Voltage Scaling) is aggressively applied to processors with Ra... [more] | DC2011-15 pp.1-6 |
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| ICD, SDM | 2010-08-26 09:10 |
Hokkaido | Sapporo Center for Gender Equality | On-Chip Supply Resonance Noise Reduction Method for Multi-IP Cores utilizing Parasitic Capacitance of Sleep Blocks Jinmyoung Kim, Toru Nakura (Univ. of Tokyo.), Hidehiro Takata, Koichiro Ishibashi (Renesas Electronics), Makoto Ikeda, Kunihiro Asada (Univ. of Tokyo.) SDM2010-124 ICD2010-39 |
This paper proposes an on-chip supply resonance noise reduction method for multi-IP cores utilizing parasitic capacitanc... [more] | SDM2010-124 ICD2010-39 pp.1-4 |
| VLD | 2009-03-13 15:40 |
Okinawa | Examination of Low-power system LSI architecture by scheduling algorithm Yoshikazu Sato, Shigeyoshi Watanabe (Shonan Inst. of Tech.) VLD2008-168 |
Reduction of power consumption of system LSI with scheduling algorithm has been described. Using CDFG the effect of powe... [more] | VLD2008-168 pp.249-254 |
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| MSS | 2008-08-04 14:15 |
Shizuoka | Shizuoka University (Hamamatsu Campus), Faculty of Engineering | The Resolution of Trade-off between Power Consumption and Task Performance Using Elastic Task Model Sayuri Terada, Toshimitsu Ushio (Osaka Univ.) CST2008-15 |
In computing systems consisting of a CPU with dynamic voltage scaling (DVS), we can reduce their power consumption by se... [more] | CST2008-15 pp.17-22 |
| MSS | 2008-06-02 14:00 |
Aichi | Nagoyo University, Noyori Conference Hall | Resource Allocation with Standby Power for Low Power Consumption and QoS-based Fairness Sayuri Terada, Toshimitsu Ushio (Osaka Univ.) CST2008-3 |
We consider resource allocation problem resolving trade-off between the average CPU power consumption in hyperperiod and... [more] | CST2008-3 pp.13-18 |
| ICD, SDM | 2007-08-23 12:50 |
Hokkaido | Kitami Institute of Technology | [Special Invited Talk]
Past and Future of Dynamic Voltage Scaling Hiroyuki Mizuno (Hitachi) SDM2007-148 ICD2007-76 |
Effectiveness and issue for Dynamic Voltage Scaling (DVS) have been described. Both dynamic and leakage power reduction ... [more] | SDM2007-148 ICD2007-76 pp.41-46 |
| ICD, SDM | 2007-08-24 15:40 |
Hokkaido | Kitami Institute of Technology | An Area-Conscious Low-Voltage-Oriented 8T-SRAM Design under DVS Environment Yasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Yusuke Iguchi (Kobe Univ.), Koji Nii (Kobe Univ./Renesas Technology), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) SDM2007-167 ICD2007-95 |
This paper demonstrates that an 8T memory cell can be alternative design to a 6T cell in a future highly-integrated SRAM... [more] | SDM2007-167 ICD2007-95 pp.139-144 |
| IE, SIP, ICD, IPSJ-SLDM | 2004-10-21 13:00 |
Yamagata | Power-Minimum Frequency/Voltage Cooperative Management Method in Sub-decimicron Era Kentaro Kawakami, Miwako Kanamori, Yasuhiro Morita, Jun Takemura, Masayuki Miyama (Kanazawa Univ.), Masahiko Yoshimoto (Kobe Univ.) |
To achieve both of a high peak performance and low average power characteristics, frequency-voltage cooperative control ... [more] | SIP2004-82 ICD2004-114 IE2004-58 pp.37-42 |
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