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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| HWS, VLD [detail] | 2020-03-04 16:00 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Pixel-based Mask Optimization with Lagrangian Relaxation and Boundary Flipping Rina Azuma, Yukihide Kohira (Univ. of Aizu), Tomomi Matsui, Atsushi Takahashi (Tokyo Tech), Chikaaki Kodama (KIOXIA)  VLD2019-105 HWS2019-78 |
Due to miniaturization of process technology, progressing manufacturing process by optical lithography is required. In r... [more] | VLD2019-105 HWS2019-78 pp.65-70 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-07 14:10 |
Hiroshima | Satellite Campus Hiroshima | Process Variation-aware Model-based OPC using 0-1 Quadratic Programming Rina Azuma, Yukihide Kohira (Univ. of Aizu), Tomomi Matsui, Atsushi Takahashi (Tokyo Tech), Chikaaki Kodama, Shigeki Nojima (TMC) VLD2018-70 DC2018-56 |
Due to continuous shrinking of Critical Dimensions (CD) of layout pattern in VLSI, advances of manufacturing process in ... [more] | VLD2018-70 DC2018-56 pp.209-214 |
| VLD, IPSJ-SLDM | 2018-05-16 15:50 |
Fukuoka | Kitakyushu International Conference Center | Pixel-based OPC using Quadratic Programming for Mask Optimization Rina Azuma, Yukihide Kohira (Univ. of Aizu) VLD2018-3 |
Due to continuous shrinking of Critical Dimensions (CD) in semiconductor manufacturing, advance of process technology in... [more] | VLD2018-3 pp.31-36 |
| VLD, HWS (Joint) |
2018-03-01 09:25 |
Okinawa | Okinawa Seinen Kaikan | Efficient Generation of Lithography Hotspot Detector based on Transfer Learning Shuhei Suzuki, Yoichi Tomioka (UoA) VLD2017-106 |
As semiconductor features shrink in size, the fidelity of the layout pattern transferred onto the wafer decreases. A layo... [more] | VLD2017-106 pp.103-108 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 14:55 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | [Invited Talk]
EDA Research Activities in The University of Texas at Austin Tetsuaki Matsunawa (Toshiba) VLD2015-50 DC2015-46 |
International competition in EDA research is getting more intense. In major international conference, such as DAC or IC... [more] |
VLD2015-50 DC2015-46 p.73 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-29 17:00 |
Miyazaki | NewWelCity Miyazaki | [Keynote Address]
Lithography : past, present, and future Shigeki Nojima (Toshiba) VLD2011-81 CPM2011-161 ICD2011-93 CPSY2011-48 DC2011-57 RECONF2011-49 |
Lithography is one of the key technologies for semiconductor device shrink. For example, wave length becomes shorter an... [more] |
VLD2011-81 CPM2011-161 ICD2011-93 CPSY2011-48 DC2011-57 RECONF2011-49 p.171(VLD), p.65(CPM), p.65(ICD), p.33(CPSY), p.171(DC), p.45(RECONF) |
| ICSS | 2011-03-25 15:35 |
Tokyo | Suspended | Development and evaluation of PDF malware analysis system using dynamic analysis Masaki Kamizono, Masata Nishida, Yuji Hoshizawa (Securebrain Corp.) ICSS2010-64 |
Several Adobe Reader zero-day vulnerabilities have been discovered recently, and the threat of PDF malware continues to ... [more] | ICSS2010-64 pp.47-52 |
| ICD | 2007-04-12 14:20 |
Oita | A voltage scalable advanced DFM RAM with accelerated screening for low power SoC platform Hiroki Shimano, Fukashi Morishita, Katsumi Dosaka, Kazutami Arimoto (Renesas Technology Corp.) ICD2007-8 |
The advanced-DFM (Design For Manufacturability) RAM provides the solution for the limitation of SRAM voltage scaling dow... [more] | ICD2007-8 pp.41-46 |
|
| SDM, VLD | 2006-09-25 14:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Report on 2006 DAC
-- Low Power Design Methodology -- Shigeru Kuriyama (STARC) |
We report the outline about 43rd Design Automation Conference held in San Francisco on July, 2006. We report brief summa... [more] | VLD2006-37 SDM2006-158 pp.19-23 |
| ICD, VLD | 2006-03-10 14:25 |
Okinawa | A reconfigurable circuit to utilize and compensate device variations Manabu Kotani, Kazuya Katsuki, Kosuke Ogata, Kazutoshi Kobayashi, Hidetoshi Onodera (Kyoto Univ.) |
This paper provides the principle and architecture of a reconfigurable circuit utilizing Within-Die variaitions and sho... [more] | VLD2005-130 ICD2005-247 pp.49-54 |
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