IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
... (for ESS/CS/ES/ISS)
Tech. Rep. Archives
... (for ES/CS)
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 13件中 1~13件目  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
IE, IMQ, MVE, CQ
(Joint) [detail]
2020-03-05
10:50
Fukuoka Kyushu Institute of Technology Effect of Physical Ethernet Port Re-Plugging on Active TCP Flows
Marat Zhanikeev (Tokyo Univ. of Science) CQ2019-139
In search of an effective cut-through strategy at Layer 2 networking, this paper looks at the physical Ethernet port unp... [more] CQ2019-139
pp.25-28
PN 2016-11-18
14:25
Saitama KDDI Research, Inc. The Switchboard Traffic Engineering Problem for Mixed Contention/Cut-Through Output Channels
Marat Zhanikeev (Tokyo Univ. of Science) PN2016-39
Recent literature on traffic control in datacenter intra- and interconnect has moved from optical burst switching and FC... [more] PN2016-39
pp.83-86
CS, CQ, NV
(Joint)
2016-04-22
13:25
Tokyo Kikai-Shinko-Kaikan Bldg. On a Hybrid Packets-and-Circuits Switching Logic
Marat Zhanikeev (Tokyo Univ. of Science) CS2016-8
The packets versus circuits argument is several decades old. Back in the day, what we today refer to as all-IP networki... [more] CS2016-8
pp.43-46
MoNA, IN
(Joint)
2015-11-17
13:30
Kumamoto Kumamoto University Back to Rings but not Tokens: Physical and Logical Designs for Distributed Filesystems intended for Bulk Transfer over E2E Emulated Cut-Through Circuits
Marat Zhanikeev (Kyutech) IN2015-62
Previous research has solidified the core idea referred to as circuit emulation. The chief premise is that bulk transfe... [more] IN2015-62
pp.7-10
OCS, OPE, LQE 2014-10-30
15:30
Nagasaki Nagasaki Museum of History and Culture A City Traffic Model for Optical Circuit Switching in Data Centers
Marat Zhanikeev (Kyushu Inst. of Tech.) OCS2014-63 OPE2014-107 LQE2014-81
Circuit emulation in optical domains can be implemented by scheduling sessions on lightpaths. This is traditionally an N... [more] OCS2014-63 OPE2014-107 LQE2014-81
pp.113-116
RECONF 2013-05-21
10:10
Kochi Kochi Prefectural Culture Hall Design and Evaluation of FPGA-based ASIC Emulator using High-speed Serial Communication
Takashige Uda, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2013-10
Recently, development period of ASIC is longer becouse of the increase in circuit scale.
Verification process accounts ... [more]
RECONF2013-10
pp.49-54
CS, OCS
(Joint)
2012-01-26
09:50
Mie ISESHI-KANKOUBUNKAKAIKAN Development of Access Systems employing Synchronous Ethernet -- Toward the application of carrier Ethernet services --
Seiji Yoshida, Takayoshi Tashiro, Youichi Fukada, Takeshi Sakamoto, Naoto Yoshimoto, Yoshio Kajiyama (NTT) CS2011-83
Access systems based on synchronous Ethernet(SyncE) have been developed and frequency synchronization characteristics ha... [more] CS2011-83
pp.13-18
VLD, CPSY, RECONF, IPSJ-SLDM 2009-01-30
14:10
Kanagawa   Delay Evaluation of 90nm CMOS Multi-Context FPGA for Large-Scale Circuit Emulation
Naoto Miyamoto, Tadahiro Ohmi (Tohoku Univ.) VLD2008-119 CPSY2008-81 RECONF2008-83
For large-scale circuit emulation with using a multi-context FPGA (MC-FPGA), a circuit is divided into multiple sub-circ... [more] VLD2008-119 CPSY2008-81 RECONF2008-83
pp.165-170
CS, OCS, PN
(Joint)
2006-05-25
11:50
Shizuoka Shizuoka Univ. Proposal and Experimental Verification of Packet Discard Compensation Technique for Suppressing Burst-Error of Circuit-Emulated TDM
Youichi Fukada, Koichi Saito (NTT), Yoichi Maeda (NTT-AT) CS2006-16
In circuit emulation that accommodates TDM signal over packet network such as Ethernet, a packet discard causes burst-er... [more] CS2006-16
pp.13-17
CS 2006-01-16
15:45
Oita Yufugo-kan (Oita) [Invited Talk] Technologies of Circuit Emulation Service
Youichi Fukada, Koichi Saito, Yoichi Maeda (NTT)
Standardization and commercial deployment of circuit emulation that accommodates TDM signal in packet switched network (... [more] CS2005-77
pp.31-36
CS 2005-11-18
09:00
Hokkaido Yonokawa Prince Hotel Experimental Verification of Adaptive Clock Recovery Method Utilizing Proportional-Integral-Derivative (PID) Control for Circuit Emulation
Youichi Fukada, Takeshi Yasuda, Shuji Komatsu, Koichi Saito, Yoichi Maeda (NTT)
Circuit emulation service accommodates synchronous TDM signals over asynchronous packet networks such as Ethernet, IP, e... [more] CS2005-43
pp.37-42
NS, CS, IN 2004-09-03
10:30
Miyagi Tohoku University A Consideration of Protection Function for CES on TDM over Ether
Atsushi Iwamura, Akihiko Tanaka, Toshihiko Fujita, Yoshihiro Ashi (HITACHI COM)
The Ethernet network is widely spread and adopted to the access portion or metro area for the reason of its economical a... [more] NS2004-104 IN2004-63 CS2004-59
pp.19-24
CS 2004-07-09
14:05
Niigata Nagaoka University of Technology A Development of Circuit Emulation Function on TDM over Ethernet
Atsushi Iwamura, Akihiko Tanaka, Toshihiko Fujita, Yoshihiro Ashi (Hitachi COM)
The Ethernet network is widely spread and adopted to the access portion or metro area for the reason of its economical a... [more] CS2004-35
pp.39-44
 13件中 1~13件目  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : 以上の論文すべての著作権はIEICEに帰属します.(許諾番号:10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan