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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 21  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
HWS, ICD [detail] 2021-10-19
10:00
Online Online Evaluations of tamper resistance by Wave-FF for Power Analysis Attack on AES
Tomoaki Ukezono (Fukuoka Univ.) HWS2021-41 ICD2021-15
Dual-Rail design represented by WDDL can be mentioned as a countermeasure against information leakage from power consump... [more] HWS2021-41 ICD2021-15
pp.1-6
SIP, IT, RCS 2021-01-22
16:45
Online Online Revisiting the IND-CPA Security of LWE Encryption Scheme
Takahiro Arai, Bagus Santoso, Kaoru Takemure (UEC) IT2020-111 SIP2020-89 RCS2020-202
In this paper, we propose a new simpler security notion which is
equivalence to the standard IND-CPA notion,
and base... [more]
IT2020-111 SIP2020-89 RCS2020-202
pp.271-276
NS, ICM, CQ, NV
(Joint)
2019-11-22
09:00
Hyogo Rokkodai 2nd Campus, Kobe Univ. Twilio services analyses and positioning by view of IN services implementation technology.
Yoshihiro Konno (Twilio Japan) NS2019-127
Twilio is Cloud API service (Cloud Communication Platform) which allows adding capabilities like voice, messaging (SMS/C... [more] NS2019-127
pp.39-44
IA, ICSS 2019-06-07
11:45
Miyagi Research Institute for Electrical Communication, Tohoku University A Survey on the Risks of Bypassing Public Captive Portals through Covert Channels
Hidetaka Masuda, Hideya Ochiai, Hiroshi Esaki (UTokyo) IA2019-9 ICSS2019-9
Public Wi-Fi networks have spread to the world and is now an important infrastructure to us. However, there are many hot... [more] IA2019-9 ICSS2019-9
pp.43-48
LQE, LSJ 2017-05-25
15:40
Ishikawa   [Invited Talk] Ultra-high intensity, repetitive J-KAREN-P laser system at QST
Hiromitsu Kiriyama, Mamiko Nishiuchi, Alexander Pirozhkov, Yuji Fukuda, Hironao Sakaki, Akito Sagisaka, Nicholas Dover, Kotaro Kondo, Keita Nishitani, Koichi Ogura, Michiaki Mori, Yasuhiro Miyasaka, Masaki Kando, Kiminori Kondo (QST) LQE2017-5
The OPCPA/Ti:sapphire hybrid laser system (named J-KAREN-P laser system) at QST is an infrastructure aiming to realize e... [more] LQE2017-5
pp.21-23
LQE, LSJ 2017-05-25
16:05
Ishikawa   Development of a high-energy green laser for an optically synchronized OPCPA
Yasuhiro Miyasaka, Hiromitsu Kiriyama, Maki Kishimoto, Michiaki Mori, Masaki Kando, Kiminori Kondo (QST)
We are developing an optically synchronized pump source for stabilization of output parameters in optical parametric chi... [more] LQE2017-6
pp.25-28
EMCJ, IEE-EMC 2014-06-20
11:25
Hyogo Kobe Univ. Investigation on Aes Circuites in Information-Leaking-Behavior by Means of Internal Equivalent Current Source
Nobuhiro Tai, Kengo Iokibe, Hiroto Kagotani, Hiroyuki Onishi, Kazuhiro Maeshima, Yoshitaka Toyota (Okayama Univ.), Tetsushi Watanabe (Industrial Technology Center of Okayama Prefecture) EMCJ2014-12
 [more] EMCJ2014-12
pp.13-18
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-27
10:20
Kagoshima   Performance Evaluation of Tamper-Resistant AES Cryptographic Circuit utilizing Hybrid Masking Dual-Rail ROM
Shintaro Ukai, Tsunato Nakai, Toshiki Kitamura, Takaya Kubota, Mitsuru Shiozaki, Takeshi Fujino (Ritsumeikan Univ.) CPM2013-111 ICD2013-88
Tamper-resistant devices require to protect cryptographic circuit from side-channel attacks such as power analysis (PA) ... [more] CPM2013-111 ICD2013-88
pp.19-24
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2012-11-28
10:55
Fukuoka Centennial Hall Kyushu University School of Medicine AES Cryptographic Circuit utilizing Dual-Rail RSL Memory Technique
Yuki Hashimoto, Mitsuru Shiozaki, Takaya Kubota, Takeshi Fujino (Ritsumeikan Univ.) CPM2012-120 ICD2012-84
Tamper LSI design methodology has to be applied in order to implement secure cryptographic circuit, which is resistant t... [more] CPM2012-120 ICD2012-84
pp.43-48
ISEC 2012-09-21
16:15
Tokyo Kikai-Shinko-Kaikan Bldg. Pilot Lamps can Serve as Side Channels
Shohei Saito, Tsutomu Matsumoto (Yokohama Nat'l Univ.) ISEC2012-54
Measuring microscopic variation of physical quantity such as power consumption or electromagnetic emanation of cryptogra... [more] ISEC2012-54
pp.51-58
RECONF 2012-09-18
13:20
Shiga Epock Ritsumei 21, Ritsumeikan Univ. [Invited Talk] The LSI Design Methodology of Tamper Resistant Cryptographic Circuit
Takeshi Fujino, Mitsuru Shiozaki, Takaya Kubota (Ritsumeikan Univ.), Masaya Yoshikawa (Meijyo Uiv.) RECONF2012-29
Tamper LSI Design Methodology have to be applied in order to implement secure cryptographic circuit which is resistant t... [more] RECONF2012-29
pp.31-36
EMCJ 2011-04-22
14:35
Hyogo University of Hyogo Decoupling of Power Distribution Network to Improve Tolerance of Side-Channel Attacks in Cryptographic FPGA
Tetsuo Amano, Kengo Iokibe, Yoshitaka Toyota (Okayama Univ.) EMCJ2011-4
Side-channel attack is a cryptanalytic attack by means of radio frequency (RF) power current from cryptographic IC. On-b... [more] EMCJ2011-4
pp.19-24
DC, CPSY 2011-04-12
14:30
Tokyo   [Invited Talk] Tamper LSI Design Methodology Resistant to Malicious Attack
Takeshi Fujino, Mitsuru Shiozaki (Ritsumeikan Univ.), Masaya Yoshikawa (Meijyo Univ.) CPSY2011-4 DC2011-4
Tamper LSI Design Methodology have to be applied in order to implement secure cryptographic circuit which is resistant t... [more] CPSY2011-4 DC2011-4
pp.17-22
VLD 2011-03-03
10:20
Okinawa Okinawaken-Danjo-Kyodo-Sankaku Center Implementation and Security Evaluation of DPA-Resistant DES Circuit utilizing Domino-RSL technique
Katsuhiko Iwai, Kenji Kojima, Mitsuru Shiozaki, Syunsuke Asagawa, Takeshi Fujino (Ritsumeikan Univ.) VLD2010-126
Some secure DPA-resistant techniques to protect from Side-Channel Attack such as Differential Power Analysis (DPA) have ... [more] VLD2010-126
pp.57-62
ISEC 2010-12-15
13:50
Tokyo Kikai-Shinko-Kaikan Bldg. The Mutual Information Analysis using a classification technique of combination
Kuniji Wakabayashi, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2010-67
Against Side channel Attack Standard Evaluation BOard(SASEBO) implemented the AES encryption as hardware circuit, carr... [more] ISEC2010-67
pp.13-18
ISEC 2010-12-15
14:15
Tokyo Kikai-Shinko-Kaikan Bldg. Logarithmic model based CPA with low pass filter
Atsunori Sakurai, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2010-68
Depending on an implementation method of AES, I show that it comes off from the linear nature when I classified consumpt... [more] ISEC2010-68
pp.19-24
ISEC 2009-05-22
10:45
Tokyo Kikai-Shinko-Kaikan Bldg. Estimation of CPA attack for AES using Simulation method
Kimihiro Yamakoshi, Akihiro Yamagishi (NTT) ISEC2009-3
(To be available after the conference date) [more] ISEC2009-3
pp.13-20
ISEC 2008-12-17
15:45
Tokyo Kikai-Shinko-Kaikan Bldg. Construction of the experiment environment for the CPA attack
Daisaku Minamizaki, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2008-99
SASEBO(Side-channel Attack Standard Evaluation BOard) was developed with the aim of integrating at establishment of the ... [more] ISEC2008-99
pp.61-66
ISEC 2008-05-16
09:30
Tokyo Kikai-Shinko-Kaikan Bldg. Verification of a side-channel attack to an AES circuit on SASEBO
Daisaku Minamizaki, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2008-1
Recently, the research on the side-channel attack is actively done, and SASEBO board that conformed to the INSTAC32 was ... [more] ISEC2008-1
pp.1-8
ISEC 2008-05-16
09:55
Tokyo Kikai-Shinko-Kaikan Bldg. An implementation of an automatic analyzer for side channel attacks
Keisuke Iwai, Daisaku Minamizaki, Takakazu Kurokawa (NDA) ISEC2008-2
Recently, environments for experiments of side-channel attacks are being developed. On the other hand, there is not enou... [more] ISEC2008-2
pp.9-14
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