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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-03 10:50 |
Nagasaki |
Nagasaki Kinro Fukushi Kaikan |
[Invited Talk]
Development of Via Structures in IC Package Substrates for Impedance Reduction Tomoyuki Akaboshi, Taiga Fukumori, Daisuke Mizutani, Motoaki Tani (Fujitsu Lab.) CPM2015-136 ICD2015-61 |
This paper describes the impedance reduction technologies in build-up package substrates for high performance CPU, such ... [more] |
CPM2015-136 ICD2015-61 pp.51-54 |
EMD |
2009-01-23 16:35 |
Kanagawa |
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Manufacturing Technology for Embedded LSI(WLP) Substrates Keisuke Okada (NEC Toppan Circuit Solutions. INC.) EMD2008-119 |
Device embedding technologies that make three-dimensional effective utilization of packaging space possible have attract... [more] |
EMD2008-119 pp.33-37 |
ICD, CPM |
2005-09-08 09:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
The comparison of electrical characteristics of FCBGA packaging substrate based on MLTS and conventional build-up PWB Jun Sakai, Koichiro Nakase (NEC), Hirokazu Honda (NECエレクトロニクス), Hirobumi Inoue (NEC) |
We heve developed an ultra-thin high-density packaging substrate, called an MLTS (multi-layer thin substrate), that cons... [more] |
CPM2005-85 ICD2005-95 pp.1-6 |
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