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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| SCE | 2024-01-23 15:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. (Primary: On-site, Secondary: Online) |
Microwave generator based on a single-flux-quantum pulse-frequency modulation D/A converter Seiya Hayashi, Hiroshi Shimada, Yoshinao Mizugaki (UEC Tokyo)  SCE2023-26 |
Pulse Frequency Modulation-D/A Converters (PFM-DACs) based on Single Flux Quantum (SFQ) circuits have been developed for... [more] | SCE2023-26 pp.19-24 |
| MW | 2023-11-16 13:25 |
Okinawa | Nago City Industrial Support Center (Okinawa) (Primary: On-site, Secondary: Online) |
Riemann Pump RF-Power DAC with Novel GaN HEMT Cell Utilizing Charge Reuse Transistor Control Mechanism Yuta Fuchibe, Shuichi Sakata, Yuji Komatsuzaki, Shintaro Shinjo (Mitsubishi Electric Corp) MW2023-129 |
We propose a new circuit topology for multi-bit Riemann Pump (RP) digital-to-analog converters (DACs). The RP-DAC is a D... [more] | MW2023-129 pp.19-22 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-16 16:20 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
A multi bit PWM-DAC with calibration for quantum computing Shunsuke Akahosh, Nobukazu Takai (KIT) VLD2023-56 ICD2023-64 DC2023-63 RECONF2023-59 |
We propose a structure and control method of a multi-bit PWMDAC for controlling qubits operating in a dilution refrigera... [more] | VLD2023-56 ICD2023-64 DC2023-63 RECONF2023-59 pp.136-139 |
| NC, MBE (Joint) |
2023-10-28 10:45 |
Miyagi | Tohoku Univ. (Primary: On-site, Secondary: Online) |
A design of ultra-low power reservoir computing system with analog CMOS spiking neural network circuits Satoshi Ono, Satoshi Moriya, Hideaki Yamamoto (Tohoku Univ.), Yasushi Yuminaka (Gunma Univ.), Yoshihiko Horio, Shigeo Sato (Tohoku Univ.) NC2023-29 |
Spiking neural network (SNN) is expected to be applied to edge computing due to its low power consumption when implement... [more] | NC2023-29 p.23 |
| NLP, CAS | 2023-10-07 11:30 |
Gifu | Work plaza Gifu | Reproduction of Firing Phenomena in a Piecewise Constant Neuron Model by Automatic Cellular Differentiation Method Kengo Hosoi, Hiroyuki Torikai (Hosei Univ) CAS2023-53 NLP2023-52 |
In this study, the cellular differentiation method for a piecewise-constant neuron model is designed using hardware. The... [more] | CAS2023-53 NLP2023-52 pp.104-105 |
| EMM, IT | 2023-05-12 10:15 |
Kyoto | Rakuyu Kaikan (Kyoto Univ. Yoshida-South Campus) (Primary: On-site, Secondary: Online) |
Gradient flow decoding for LDPC codes Tadashi Wadayama, Kensho Nakajima, Ayano Nakai-Kasai (NiTech) IT2023-8 EMM2023-8 |
The power consumption of the integrated circuit is becoming a significant burden, particularly for large-scale signal pr... [more] | IT2023-8 EMM2023-8 pp.37-42 |
| CCS | 2023-03-26 10:55 |
Hokkaido | RUSUTSU RESORT | A Stochastic Memory for Ultralow-Power IoT Devices and its Subthreshold CMOS Circuit Implementation Seiya Muramatsu, Kohei Nishida, Kota Ando (Hokkaido Univ.), Megumi Akai-Kasaya (Osaka Univ./Hokkaido Univ.), Tetsuya Asai (Hokkaido Univ.) CCS2022-68 |
We propose a CMOS circuit implementation of a memory circuit for ultralow-power IoT devices based on stochastic computin... [more] | CCS2022-68 pp.31-35 |
| CCS | 2023-03-26 11:15 |
Hokkaido | RUSUTSU RESORT | Hardware Implementation of Predictive Coding Networks based on the Free Energy Principle Naruki Hagiwara, Takafumi Kunimi, Kota Ando (Hokkaido Univ.), Megumi Akai (Hokkaido Univ./Osaka Univ.), Tetsuya Asai (Hokkaido Univ.) CCS2022-69 |
Agents form generative models in the brain through perception and actions for adapting to the external environment. In t... [more] | CCS2022-69 pp.36-41 |
| HWS, VLD | 2023-03-03 09:55 |
Okinawa | (Primary: On-site, Secondary: Online) |
Track Assignment considering Routing Crossing Relations to Improve Feasibility in Bottleneck Channel Routing Kazuya Taniguchi, Satoshi Tayu, Atsushi Takahashi (Tokyo Tech), Molongo Mathieu, Makoto Minami, Katsuya Nishioka (Jedat) VLD2022-101 HWS2022-72 |
Design automation that realizes analog integrated circuits to meet performance specifications in a small area is desired... [more] | VLD2022-101 HWS2022-72 pp.149-154 |
| CAS, MSS, IPSJ-AL [detail] | 2022-11-17 14:15 |
Kochi | (Primary: On-site, Secondary: Online) |
Evaluation of Theoretical Formula for Inter-band Level Deviation in DAC Bandwidth Tripler Hayato Ishii (Tokyo Univ. of Science), KeisuKeisuke Kawahara (Yokohama National Univ.), Yohtaro Umeda, koyoya Takano (Tokyo Univ. of Science) CAS2022-40 MSS2022-23 |
For wider bandwidth of optical transmitter circuit, DAC Bandwidth Tripler that extends the bandwidth of broadband digita... [more] | CAS2022-40 MSS2022-23 pp.19-24 |
| NC, MBE (Joint) |
2022-09-29 10:25 |
Miyagi | Tohoku Univ. (Primary: On-site, Secondary: Online) |
Analog circuit implementation of spiking neural networks and its application to time-series information processing Satoshi Moriya, Hideaki Yamamoto (Tohoku Univ), Yasushi Yuminaka (Gunma Univ.), Shigeo Sato, Yoshihiko Horio (Tohoku Univ) NC2022-33 |
Edge computing in which low-dimensional signals such as sensor output are processed nearby sensors have become increasin... [more] | NC2022-33 p.5 |
| NC, IBISML, IPSJ-BIO, IPSJ-MPS [detail] | 2022-06-29 14:20 |
Okinawa | (Primary: On-site, Secondary: Online) |
LSI implementation of analog CMOS majority circuit for neural network applications Satoshi Ono, Satoshi Moriya, Yuka Kanke, Hideaki Yamamoto (Tohoku Univ.), Yasushi Yuminaka (Gunma Univ.), Shigeo Sato (Tohoku Univ.) NC2022-27 IBISML2022-27 |
Majority logic circuit is a circuit whose output is the majority value of multiple binary inputs. It can be applied to b... [more] | NC2022-27 IBISML2022-27 pp.189-192 |
| CAS, SIP, VLD, MSS | 2022-06-16 13:00 |
Aomori | Hachinohe Institute of Technology (Primary: On-site, Secondary: Online) |
[Special Invited Talk]
Progress of RF Circuits and Mixed RF Analog-Digital Circuits for Mobile Communication Terminals Satoshi Tanaka (Murata Manufacturing) CAS2022-5 VLD2022-5 SIP2022-36 MSS2022-5 |
RF circuit technology and mixed RF analog-digital circuit technology for mobile communication terminals have made great ... [more] | CAS2022-5 VLD2022-5 SIP2022-36 MSS2022-5 pp.22-27 |
| ED | 2022-04-21 11:00 |
Online | Online | TIQ Based Flash ADC with Threshold Compensation Yuhei Hashimoto, Cong-Kha Pham (UEC) ED2022-5 |
It is known that Analog-to-digital converter using TIQ comparators are vulnerable to process and temperature variations,... [more] | ED2022-5 pp.15-18 |
| VLD, HWS [detail] | 2022-03-07 09:35 |
Online | Online | Bottleneck Channel Routing to Reduce the Area of Analog VLSI Kazuya Taniguchi, Satoshi Tayu, Atsushi Takahashi (Tokyo Tech), Yukichi Todoroki, Makoto Minami (Jedat) VLD2021-77 HWS2021-54 |
Design automation that realizes analog integrated circuits to meet performance specifications in a small area is desired... [more] | VLD2021-77 HWS2021-54 pp.7-12 |
| NLP, MICT, MBE, NC (Joint) [detail] |
2022-01-23 09:50 |
Online | Online | Analog-circuit design of STDP learning rule with linear decay and its LSI implementation Satoshi Moriya, Tatsuki Kato (Tohoku Univ.), Yasushi Yuminaka (Gunma Univ.), Hideaki Yamamoto, Shigeo Sato, Yoshihiko Horio (Tohoku Univ.) NC2021-40 |
Spiking neural networks (SNNs) are expected to be the next generation of information processing technology to reduce the... [more] | NC2021-40 p.44 |
| NLP, MICT, MBE, NC (Joint) [detail] |
2022-01-23 10:15 |
Online | Online | Analog CMOS implementation of majority logic for neuromorphic circuit applications Satoshi Ono, Satoshi Moriya, Yuka Kanke, Hideaki Yamamoto (Tohoku Univ.), Yasushi Yuminaka (Gunma Univ.), Shigeo Sato (Tohoku Univ.) NC2021-41 |
A majority logic circuit is a circuit whose output is the majority value of multiple binary inputs. In addition to its c... [more] | NC2021-41 pp.45-48 |
| NLP | 2021-12-18 14:50 |
Oita | J:COM Horuto Hall OITA | Experiment of time series signal classification task using 3D cyclic chaotic neural network reservoir Takemori Orima, Yoshihiko Horio (Tohoku Univ.) NLP2021-65 |
The chaotic neural network reservoir composed of chaotic neurons can perform time-series signal processing with a smalle... [more] | NLP2021-65 pp.100-103 |
| EMCJ, MICT (Joint) |
2021-03-05 15:55 |
Online | Online | Polarization Characteristics of the Low Cost Broadband CA Absorber Koichi Furuya, Tsuyoshi Kobayashi, Noriyuki Fukui, Naofumi Yoneda (Mitsubishi Electric) EMCJ2020-81 |
The authors propose a low cost broadband circuit analog absorber. The element of the absorber has an asymmetric shape us... [more] | EMCJ2020-81 pp.46-50 |
| ICTSSL, CAS | 2020-01-30 13:10 |
Tokyo | [Invited Talk]
A Proposal of MOS LSI Analog Sign-Off Verification. Kimihiro Ogawa (Success Inc.) CAS2019-70 ICTSSL2019-39 |
In analog MOS circuit sign-off verification to guarantee design yield, it is well known that analog oriented methodology... [more] | CAS2019-70 ICTSSL2019-39 pp.35-41 |
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