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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-07 09:50 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | Performance Evaluation Three Dimensional FPGA Architecture with Face-down Stacking Keishiro Akashi, Motoki Amagasaki, Qian Zhao, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ)  RECONF2017-42 |
In recent years,Three-dimensional (3D) field-programmable gate arrays(FPGAs) are expected to offer higher logic density ... [more] | RECONF2017-42 pp.31-36 |
| EA, ASJ-H | 2017-08-09 15:45 |
Miyagi | Tohoku Univ., R. I. E. C. | [Invited Talk]
Realization of 252ch real-time processing of SENZI binaural sound-space sensing and reproduction method Shuichi Sakamoto (Tohoku Univ.), Satoshi Hongo (NIT, Sendai College), Takuma Okamoto (NICT), Yukio Iwaya (Tohoku Gakuin Univ.), Yo-iti Suzuki (Tohoku Univ.) EA2017-33 |
It is crucially important to reproduce accurate auditory spatial information around listeners for development of advance... [more] | EA2017-33 pp.39-40 |
| RECONF | 2015-06-19 12:00 |
Kyoto | Kyoto University | An Area Optimization of 3D FPGA with high speed inter-layer communication link Yuto Takeuchi, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ) RECONF2015-4 |
Three-dimensional (3D) stacking technology is attractive for providing another way to improve the performance of the lar... [more] | RECONF2015-4 pp.17-22 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-26 10:45 |
Oita | B-ConPlaza | Mobile robot system based on hw/sw Complex System using 3D FPGA-Array System "Vocalise" Hiromasa Kubo, Jiang Li, Satoru Yokota, Yuichi Ogishima, Masatoshi Sekine (TUAT) RECONF2014-37 |
Our laboratory has been developing the 3D FPGA-Array HPC system named “Vocalise”（Virtual Object by Configurable Array of... [more] | RECONF2014-37 pp.19-24 |
| RECONF | 2014-06-12 11:15 |
Miyagi | Katahira Sakura Hall | Three-dimensional FPGA Structure using High-speed Serial Communication Takuya Kajiwara, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2014-7 |
The three-dimensional (3D) integrated circuit technology is expected to continually improve the LSI (Large Scale Integra... [more] | RECONF2014-7 pp.31-36 |
| IPSJ-SLDM, CPSY, RECONF, VLD [detail] | 2014-01-28 16:55 |
Kanagawa | Hiyoshi Campus, Keio University | An Image Recognition System with Multi-Resolutional Feature Learning on the 3D FPGA-Array "Vocalise" Baku Ogasawara, Satoru Yokota, Jiang Li, Yusuke Atsumari, Hiromasa Kubo, Masatoshi Sekine (TUAT) VLD2013-116 CPSY2013-87 RECONF2013-70 |
We propose and develop "an image recognition system" with multi-resolutional feature learning function. The feature lear... [more] | VLD2013-116 CPSY2013-87 RECONF2013-70 pp.85-90 |
| RECONF | 2013-09-19 13:00 |
Ishikawa | Japan Advanced Institute of Science and Technology | The Circuit Configuration method of 3D FPGA-Array System "Vocalise" Hiromasa Kubo, Jiang Li, Yusuke Atsumari, Baku Ogasawara, Masatoshi Sekine (Tokyo Univ. of Agliculture and Tech.) RECONF2013-32 |
We have been developing the 3D FPGA-Array HPC system named as“Vocalise(Virtual Object by Configurable Array of Little Sc... [more] | RECONF2013-32 pp.73-78 |
| SDM | 2011-10-21 15:50 |
Miyagi | Tohoku Univ. (Niche) | Performance Evaluation of 3D FPGA using Through Silicon Via Naoto Miyamoto (Tohoku Univ.), Yohei Matsumoto (Tokyo Univ. of Marine Science and Technology), Hanpei Koike (AIST), Tadayuki Matsumura, Kenichi Osada, Yahoko Nakagawa (ASET), Tadahiro Ohmi (Tohoku Univ.) SDM2011-113 |
3D LSI fabrication is a promising technology as a representative of “More Than Moore” stream. 3D FPGA is one of the kill... [more] | SDM2011-113 pp.91-96 |
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-26 13:30 |
Kanagawa | Keio Univ (Hiyoshi Campus) | An FPGA Implementation of Array Processor Performing 3D-DCT Effectively Yuki Ikegaki, Hiroyuki Igarashi, Toshiaki Miyazaki, Stanislav G. Sedukhin (Univ. of Aizu) VLD2009-76 CPSY2009-58 RECONF2009-61 |
Ordinary array processors randomly access to input-/coefficient-data in external memories many times during the 3D-DCT, ... [more] | VLD2009-76 CPSY2009-58 RECONF2009-61 pp.41-46 |
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