Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
DC |
2010-02-15 10:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Modeling resistive open faults and generating their tests Hiroshi Takahashi, Yoshinobu Higami, Yuta Shudo, Yuji Takamune, Yuzo Takamatsu (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) DC2009-68 |
In order to solve the problem of signal integrity, we propose an extended delay fault model for modeling a resistive ope... [more] |
DC2009-68 pp.19-24 |
DC |
2010-02-15 16:05 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Consideration of Open Faults Model Based on Digital Measurement of TEG Chip Toshiyuki Tsutsumi (Meiji Univ.), Yasuyuki Kariya, Koji Yamazaki (Meiji Univ), Masaki Hashizume, Hiroyuki Yotsuyanagi (Tokushima Univ), Hiroshi Takahashi, Yoshinobu Higami, Yuzo Takamatsu (Ehime Univ) DC2009-77 |
Countermeasures against an open fault in LSI testing become more important with advancement of LSI process technology. ... [more] |
DC2009-77 pp.75-80 |
DC |
2009-06-19 11:35 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Diagnositc Test Generation for Transition Faults Using a Stuck-at ATPG Tool Yoshinobu Higami, Yosuke Kurose, Satoshi Ohno, Hironori Yamaoka, Hiroshi Takahashi (Ehime Univ.), Yoshihiro Simizu, Takashi Aikyo (STARC), Yuzo Takamatsu (Ehime Univ.) DC2009-13 |
In modern high-speed LSIs, defects that cause timing failure occur often, and thus their detection and diagnosis are get... [more] |
DC2009-13 pp.19-24 |
DC |
2009-02-16 13:50 |
Tokyo |
|
A method for generating defect oriented test patterns for combinational circuits Hiroshi Takahashi, Yoshinobu Higami, Taisuke Izumi, Takashi Aikyo, Yuzo Takamatsu (Ehime Univ.) DC2008-73 |
With shrinking of LSIs, the diversification of defective mode due to defects becomes a critical issue.
Therefore, the ... [more] |
DC2008-73 pp.31-36 |
DC |
2009-02-16 14:15 |
Tokyo |
|
On Tests to Detect Open faults with Considering Adjacent Lines Tetsuya Watanabe, Hiroshi Takahashi, Yoshinobu Higami (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ, Tokushima), Yuzo Takamatsu (Ehime Univ.) DC2008-74 |
In modern manufacturing technologies with the shrinking of manufacturing process, LSIs may have several metal interconne... [more] |
DC2008-74 pp.37-42 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 14:15 |
Fukuoka |
Kitakyushu Science and Research Park |
Analysis of Open Fault using TEG Chip Toshiyuki Tsutsumi, Yasuyuki Kariya, Koji Yamazaki (Meiji Univ), Masaki Hashizume, Hiroyuki Yotsuyanagi (Tokushima Univ), Hiroshi Takahashi, Yoshinobu Higami, Yuzo Takamatsu (Ehime Univ) VLD2008-63 DC2008-31 |
The high integration of the semiconductor technology advances, and the fault detection and the failure diagnosis of LSI ... [more] |
VLD2008-63 DC2008-31 pp.19-24 |
DC |
2008-06-20 15:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg |
Improving the Diagnostic Quality of Open Faults Koji Yamazaki, Toshiyuki Tsutsumi (Meiji Univ.), Hiroshi Takahashi, Yoshinobu Higami, Takashi Aikyo (Ehime Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.), Yuzo Takamatsu (Ehime Univ.) DC2008-16 |
With the shrinking process technologies and the use of copper process, open defects on interconnect wires, contacts and ... [more] |
DC2008-16 pp.29-34 |
DC |
2008-02-08 09:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Fault Diagnosis for Dyinamic Open Faults with Considering Adjacent Lines Hiroshi Takahashi, Yoshinobu Higami, Takashi Aikyo, Syuhei Kadoyama, Tetsuya Watanabe, Yuzo Takamatsu (Ehime Univ.), Toshiyuki Tsutsumi, Kouji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) DC2007-68 |
In modern manufacturing technologies with the shrinking of manufacturing process, LSIs may have several metal interconne... [more] |
DC2007-68 pp.7-12 |
DC |
2008-02-08 09:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Diagnostic Test Generation for Transition Faults Takashi Aikyo, Yoshinobu Higami, Hiroshi Takahashi, Toru Kikkawa, Yuzo Takamatsu (Ehime Univ.) DC2007-69 |
In modern manufacturing technologies with the shrinking of manufacturing process,
LSIs may have several metal intercon... [more] |
DC2007-69 pp.13-18 |
SS, KBSE |
2007-04-19 14:20 |
Fukushima |
Univ. of Aizu |
A Study of Unit Testing with Orthogonal Array
-- A Support Tool for JUnit -- Akira Yamada (NEC), Hirohisa Aman, Yuzo Takamatsu (Ehime Univ.) SS2007-1 KBSE2007-1 |
In recent years, the orthogonal array has been a key topic to enhance software testing.
The orthogonal array can be use... [more] |
SS2007-1 KBSE2007-1 pp.1-6 |
SITE |
2005-10-07 13:30 |
Ehime |
Matsuyama-Univ. |
[Invited Talk]
The design of Reginal Internet eXchange as the infrastructure of educational content distribution Eizen Kimura, Minoru Kawahara, Takashi Murata, Yuzo Takamatsu (Ehime Univ.) |
[more] |
SITE2005-42 pp.7-10 |
ICD, CPM |
2005-09-08 11:20 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Diagnostic Test Compaction for Combinational and Sequential Circuits Yoshinobu Higami (Ehime Univ.), Kewal K Saluja (Univ. of Wisconsin), Hiroshi Takahashi, Shin-ya Kobayashi, Yuzo Takamatsu (Ehime Univ.) |
Recently, it is getting important to reduce the cost of test and fault diagnosis.
Since the cost of test and fault diag... [more] |
CPM2005-89 ICD2005-99 pp.25-30 |
ICD, CPM |
2005-01-28 14:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
On Finding Don't Cares in Test Sequences for Sequential Circuits and Applications to Test Compaction and Power Reduction Yoshinobu Higami (Ehime Univ.), Seiji Kajihara (Kyushu Inst. Tech.), Shin-ya Kobayashi, Yuzo Takamatsu (Ehime Univ.) |
This paper presents a method for finding don't cares in test sequences hile keeping the original stuck-at fault coverage... [more] |
CPM2004-169 ICD2004-214 pp.41-46 |