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Committee Date Time Place Paper Title / Authors Abstract Paper #
DC 2020-02-26
16:35		 Tokyo   Soft Error Tolerance of Power-Supply-Noise Hardened Latches
Yuya Kinoshita, Yukiya Miura (Tokyo Metropolitan Univ.) DC2019-97		 In recent years, with the scaling down and low-power operation of VLSI circuits, reliability degradation due to soft err... [more] DC2019-97
pp.67-72
DC 2019-02-27
15:35		 Tokyo Kikai-Shinko-Kaikan Bldg. Improvement of Flip-Flop Performance Considering the Influence of Power Supply Noise
Yuya Kinoshita, Yukiya Miura (Tokyo Metropolitan Univ.) DC2018-82		 With the scaling down and low-power operation of VLSI circuits, influence on circuit behavior by power supply noise such... [more] DC2018-82
pp.67-72
DC 2018-02-20
11:40		 Tokyo Kikai-Shinko-Kaikan Bldg. A test generation method based on k-cycle testing for finite state machines
Yuya Kinoshita, Toshinori Hosokawa (Nihon Univ.), Hideo Fujiwara (Osaka Gakuin Univ.) DC2017-81		 Recent advances in semiconductor technologies have resulted in VLSI circuit density and complexity. As a result, efficie... [more] DC2017-81
pp.25-30
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