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Committee Date Time Place Paper Title / Authors Abstract Paper #
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2018-01-18
Kanagawa Raiosha, Hiyoshi Campus, Keio University Residue-weighted number conversion based on Signed-Digit arithmetic for a four moduli set
Kouhei Yamazaki, Yuuki Tanaka, Shugang Wei (Gunma Univ.) VLD2017-69 CPSY2017-113 RECONF2017-57
 [more] VLD2017-69 CPSY2017-113 RECONF2017-57
CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] 2017-01-24
Kanagawa Hiyoshi Campus, Keio Univ. A New Residue Addition Algorithm Using Signed-Digit Numbers and Its Application to RSA Encryption
Kazumasa Ishikawa, Yuuki Tanaka, Shugang Wei (Gunma Univ.) VLD2016-92 CPSY2016-128 RECONF2016-73
In this paper, we presented a new residue addition algorithm using Signed-Digit (SD) numbers for the applications such a... [more] VLD2016-92 CPSY2016-128 RECONF2016-73
RECONF, CPSY, VLD, IPSJ-SLDM [detail] 2015-01-30
Kanagawa Hiyoshi Campus, Keio University Error detection using residue signed-digit number arithmetic for arithmetic circuits
Yoshitomo Nema, Yuuki Tanaka, Kazuhiro Motegi, Shugang Wei (Gunma Univ) VLD2014-136 CPSY2014-145 RECONF2014-69
For error detection of multiply-accumulate operation, a residue error detector can be considered for the VLSI implementa... [more] VLD2014-136 CPSY2014-145 RECONF2014-69
CPSY, VLD, RECONF, IPSJ-SLDM [detail] 2013-01-16
Kanagawa   Design and Performance Evaluation of RSA Encryption Processor Using Signed-Digit Number Arithmetic
Junichi Asaoka, Yuuki Tanaka, Shugang Wei (Gunma Univ.) VLD2012-115 CPSY2012-64 RECONF2012-69
RSA encryption processing spends a lot of time on modular exponentiation of long word length, therefore the speed of the... [more] VLD2012-115 CPSY2012-64 RECONF2012-69
VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2012-01-26
Kanagawa Hiyoshi Campus, Keio University A residue - weighted number conversion algorithm based on signed-digit arithmetic for a three-moduli set
Masaya Arai, Yuuki Tanaka, Shugang Wei (Gunma Univ.) VLD2011-110 CPSY2011-73 RECONF2011-69
In this paper, a residue-weighted number conversion algorithm using SD(signed-digit) arithmetic for a moduli set \{$2^n$... [more] VLD2011-110 CPSY2011-73 RECONF2011-69
RECONF, VLD, CPSY, IPSJ-SLDM [detail] 2011-01-17
Kanagawa Keio Univ (Hiyoshi Campus) Residue Arithmetic and FIR Filter Design Based on Minimal Signed-Digit Number Representation
Rui Chen, Yuuki Tanaka, Shugang Wei (Gunma Univ.) VLD2010-96 CPSY2010-51 RECONF2010-65
Residue arithmetic based on a radix-two signed-digit (SD) number system was proposed.Compared to the design of conventio... [more] VLD2010-96 CPSY2010-51 RECONF2010-65
EA 2009-10-22
Niigata   Sound localization accuracy versus depression angle in multichannel reproduction system
Yuuki Tanaka, Haruhide Hokari, Shoji Shimada (Nagaoka Univ. of Tech.) EA2009-56
This report studies the impact of depression angles on the sound localization accuracy of a multichannel system implemen... [more] EA2009-56
COMP 2006-09-26
Ishikawa JAIST Bipancyclicity and edge-bipancyclicity of Cayley graphs generated by transpositions
Yuuki Tanaka (Gunma Univ.), Yosuke Kikuchi (Tsuyama National College of Tech.), Toru Araki (Iwate Univ.), Yukio Shibata (Gunma Univ.)
Cycle is the most fundamental graph class. For a given graph, it is
interest to find cycles of various length as subgr... [more]
COMP 2004-09-17
Hokkaido Hokkaido University A group action graph representation of the Kautz digraph
Yuuki Tanaka, Yukio Shibata (Gunma Univ.)
De Bruijn digraphs and shuffle-exchange graphs are known to be useful
models for interconnection networks. They can be ... [more]
 Results 1 - 9 of 9  /   
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