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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 8 of 8  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2017-04-21
13:25
Tokyo   [Invited Lecture] Demonstration of HfO2-Based Ferroelectric Tunnel Junction (FTJ)
Marina Yamaguchi, Shosuke Fujii, Yuuichi Kamimuta, Tsunehiro Ino, Riichiro Takaishi, Yasushi Nakasaki, Masumi Saitoh (Toshiba) ICD2017-16
In recent years, two remarkable progresses have been made on ferroelectric materials and devices. One is the demonstrati... [more] ICD2017-16
pp.85-88
SDM 2016-06-29
10:00
Tokyo Campus Innovation Center Tokyo [Invited Lecture] Effects of top TiN deposition and annealing process on electrical and physical properties of ferroelectric HfSiO MIM capacitor
Yuuichi Kamimuta, Shosuke Fujii, Riichiro Takaishi, Tsunehiro Ino, Yasushi Nakasaki, Masumi Saitoh, Masato Koyama (Toshiba) SDM2016-32
We have investigated the effect of top TiN deposition process and annealing temperature on physical and electrical prope... [more] SDM2016-32
pp.1-4
SDM 2016-01-28
10:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Carrier Transport Analysis of High-Performance Poly-Si Nanowire Transistor Fabricated by Advanced SPC with Record-High Electron Mobility
Minoru Oda, Kiwamu Sakuma, Yuuichi Kamimuta, Masumi Saitoh (Toshiba Corp.) SDM2015-121
High-performance poly-Si nanowire transistors were fabricated by Advanced SPC process, in which the process of forming a... [more] SDM2015-121
pp.5-8
SDM, ICD 2015-08-24
15:00
Kumamoto Kumamoto City [Invited Talk] Recent progress and challenges of high-mobility III-V/Ge CMOS technologies for low power LSI applications
Toshifumi Irisawa (AIST), Keiji Ikeda, Yuuichi Kamimuta, Minoru Oda, Tsutomu Tezuka (AIST/Toshiba), Tatsurou Maeda, Hiroyuki Ota, Kazuhiko Endo (AIST) SDM2015-63 ICD2015-32
 [more] SDM2015-63 ICD2015-32
pp.31-36
SDM 2015-01-27
11:15
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] High-performance tri-gate poly-Ge Junction-less p- and n-MOSFETs Fabricated by Flash Lamp Annealing Process
Koji Usuda, Yoshiki Kamata, Yuuichi Kamimuta, Takahiro Mori, Masahiro Koike, Tsutomu Tezuka (AIST) SDM2014-138
Poly-crystalline Ge (poly-Ge) layer can be candidate for the channel of stacking 3D-CMOS from the viewpoint of low-therm... [more] SDM2014-138
pp.13-16
SDM 2008-06-10
10:55
Tokyo An401・402, Inst. Indus. Sci., The Univ. of Tokyo The role of the high-k/SiO2 interface in the control of the threshold voltage for high-k MOS devices
Kunihiko Iwamoto, Yuuichi Kamimuta (MIRAI-ASET), Yu Nunoshige (Shibaura Institute of Technology), Akito Hirano, Arito Ogawa, Yukimune Watanabe (MIRAI-ASET), Shinji Migita, Wataru Mizubayashi, Yukinori Morita (MIRAI-ASRC, AIST), Masashi Takahashi (MIRAI-ASET), Hiroyuki Ota (MIRAI-ASRC, AIST), Toshihide Nabatame (MIRAI-ASET), Akira Toriumi (The University of Tokyo) SDM2008-51
 [more] SDM2008-51
pp.53-58
ICD, SDM 2007-08-24
10:20
Hokkaido Kitami Institute of Technology [Special Invited Talk] Effect of metal-gate/high-k on characteristics of MOSFETs for 32nm CMOS and beyond
Masato Koyama, Masahiro Koike, Yuuichi Kamimuta, Masamichi Suzuki, Kosuke Tatsumura, Yoshinori Tsuchiya, Reika Ichihara, Masakazu Goto, Koji Nagatomo, Atsushi Azuma, Shigeru Kawanaka, Kazuaki Nakajima, Katsuyuki Sekine (Toshiba Corp.) SDM2007-159 ICD2007-87
In this paper, influences of metal-gate and high-k gate dielectric application on MOSFET (32nm node and beyond) characte... [more] SDM2007-159 ICD2007-87
pp.101-106
ICD, SDM 2005-08-19
10:00
Hokkaido HAKODATE KOKUSAI HOTEL [Special Invited Talk] HfSiON -- its high applicability as the alternative gate dielectric based on the high thermal stability and the remaining issue --
Akira Nishiyama, Masato Koyama, Yuuichi Kamimuta, Masahiro Koike, Ryosuke Iijima, Takeshi Yamaguchi, Masamichi Suzuki, Tsunehiro Ino, Mizuki Ono (Toshiba)
The decrease in the MOS device size has long been requiring the thinning of its gate dielectrics. In order to suppress t... [more] SDM2005-146 ICD2005-85
pp.19-24
 Results 1 - 8 of 8  /   
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