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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
NC, MBE
(Joint)
2021-03-05
11:20
Online Online Memory Capacity of Sparse-Coding Hopfield model Implemented on Coherent Ising Machine
Ryuta Sasaki, Toru Aonishi (TokyoTech), Kazushi Mimura (Hiroshima City Univ.), Masato Okada (Univ. Tokyo), Yoshihisa Yamamoto (NTT/Stanford Univ.) NC2020-68
The coherent Ising machine (CIM) is being developed as one of the Ising computers for solving combinatorial optimization... [more] NC2020-68
pp.145-150
NC, MBE
(Joint)
2020-03-06
11:10
Tokyo University of Electro Communications
(Cancelled but technical report was issued)
The Analysis of Associative Memory with Discrete Synapses
Ryuta Sasaki, Toru Aonishi (Tokyo Tech) NC2019-108
Recently, as the increasing needs of the development of high-speed Ising computing specific hardware, it has been requir... [more] NC2019-108
pp.187-192
SANE 2015-11-24
10:25
Overseas AIT, Bangkok, Thailand Accurate 3-dimensional Imaging Method by Iterative Multi-static RPM with Range Points Clustering for 140 GHz Radar
Yuta Sasaki, Fang Shang, Shouhei Kidera, Tetsuo Kirimoto (UEC) SANE2015-58
 [more] SANE2015-58
pp.49-54
SCE 2014-07-23
14:50
Tokyo Kikai-Shinko-Kaikan Bldg. Improvement of 64-kb Josephson-CMOS hybrid memories toward their complete operation
Yuta Sasaki, Xizhu Peng, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2014-33
 [more] SCE2014-33
pp.51-56
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2012-11-28
10:30
Fukuoka Centennial Hall Kyushu University School of Medicine A LSI-Package-Board co-evaluation of Power noise in the Digital LSI
Kumpei Yoshikawa, Yuta Sasaki (Kobe Univ.), Kouji Ichikawa (DENSO), Yoshiyuki Saito (Panasonic), Makoto Nagata (Kobe Univ.) VLD2012-91 DC2012-57
Problems related with power noise in LSI system are getting prominent
because of the higher integration and lower $V_{d... [more]
VLD2012-91 DC2012-57
pp.183-188
EMCJ 2012-04-20
15:10
Ishikawa Kanazawa Univ. Integrated evaluation of on-board and on-chip power noise measurement results in digital LSI
Kumpei Yoshikawa, Yuta Sasaki (Kobe Univ.), Kouji Ichikawa (DENSO), Makoto Nagata (Kobe Univ.) EMCJ2012-7
In recent LSI system designs, noise environment of LSI system is getting worse.
Therefore proper noise oriented design ... [more]
EMCJ2012-7
pp.37-42
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-30
09:25
Miyazaki NewWelCity Miyazaki Measurements and Co-Simulation of On-Chip and On-Boad AC Power Noise in Digital Integrated Circuits
Kumpei Yoshikawa, Yuta Sasaki (Kobe Univ.), Kouji Ichikawa (DENSO), Yoshiyuki Saito (Panasonic), Makoto Nagata (Kobe Univ./CREST,JST) CPM2011-163 ICD2011-95
Power noise of an integrated circuit (IC) chip is dominantly characterized by the frequency-domain impedance of a chip-p... [more] CPM2011-163 ICD2011-95
pp.73-78
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2010-11-29
10:40
Fukuoka Kyushu University Evaluation of frequency components of power noise in CMOS digital LSI
Kumpei Yoshikawa, Hiroshi Matsumoto, Yuta Sasaki (Kobe Univ.), Makoto Nagata (Kobe Univ./CREST-JST) CPM2010-124 ICD2010-83
Recent trends of electric devices are higher performance and/or lower power consumption.
To achieve these designs, LSI ... [more]
CPM2010-124 ICD2010-83
pp.1-6
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2009-12-04
10:40
Kochi Kochi City Culture-Plaza A Proposal of Message Driven IP Core Interface
Ryuta Sasaki, Tsugio Nakamura, Hiroshi Kasahara, Narito Fuyutsume (Tokyo Denki Univ.) CPSY2009-48
In a ULSI such as SoC, various IP cores developed by different firms are integrated into single-chip. Therefore problems... [more] CPSY2009-48
pp.31-36
VLD, CPSY, RECONF, IPSJ-SLDM 2009-01-29
10:55
Kanagawa   A Proposal of Message Driven IP Core Interface
Ryuta Sasaki, Tsugio Nakamura, Narito Fuyutsume, Hiroshi Kasahara, Teruo Tanaka (Tokyo Denki Univ.) VLD2008-96 CPSY2008-58 RECONF2008-60
In a ULSI such as SoC, various IP cores with different development firms are integrated in single-chip. Therefore proble... [more] VLD2008-96 CPSY2008-58 RECONF2008-60
pp.31-36
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