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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2020-05-28 13:30 |
Online | Online | Development of Auitonomous Driving System Using Programmable SoC Ryo Aono, Takumi Nagahara, Tomonari Tanaka, Itsuki Ikeno, Wang Liao, Yukio Mitsuyama (Kochi Univ.of Tech)  RECONF2020-4 |
[more] | RECONF2020-4 pp.19-23 |
| RECONF | 2020-05-28 14:20 |
Online | Online | Soft error evaluation platform for FPGA based autonomous vehicles Tomonari Tanaka, Wang Liao, Yukio Mitsuyama (Kochi Univ. of Tech.) RECONF2020-6 |
(To be available after the conference date) [more] | RECONF2020-6 pp.31-35 |
| RECONF | 2016-09-06 14:15 |
Toyama | Univ. of Toyama | RECONF2016-39 |
[more] | RECONF2016-39 pp.75-80 |
| DC, CPSY | 2015-04-17 13:25 |
Tokyo | A study of processor architecture suited for intelligent sensing system Hiroki Hihara, Akira Iwasaki (Univ. of Tokyo), Masanori Hashimoto (Osaka Univ./JST CREST), Hiroyuki Ochi (Rits/JST CREST), Yukio Mitsuyama (KUT/JST CREST), Hidetoshi Onodera (Kyoto Univ./JST CREST), Hiroyuki Kanbara (ASTEM/JST CREST), Kazutoshi Wakabayashi, Takashi Takenaka, Takashi Takenaka, Hiromitsu Hada, Munehiro Tada (NEC/JST CREST) CPSY2015-8 DC2015-8 |
Sensor nodes are now important elements for the system of social infrastructure, and thus intelligent processing capabil... [more] | CPSY2015-8 DC2015-8 pp.43-48 |
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| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-28 11:05 |
Kagoshima | [Invited Talk]
Toward VLSI Reliability Enhancement by Reconfigurable Architecture Takao Onoye, Masanori Hashimoto (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. of Tech.), Dawood Alnajjar, Hiroaki Konoura (Osaka Univ.) VLD2013-87 CPM2013-122 ICD2013-99 CPSY2013-63 DC2013-53 RECONF2013-51 |
Owing to wide spread of VLSI systems, a failure of the VLSIs may lead critical issue in our daily life. Especially in so... [more] | VLD2013-87 CPM2013-122 ICD2013-99 CPSY2013-63 DC2013-53 RECONF2013-51 p.183(VLD), p.81(CPM), p.81(ICD), p.27(CPSY), p.183(DC), p.69(RECONF) |
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| RECONF | 2013-05-20 17:40 |
Kochi | Kochi Prefectural Culture Hall | Flexible reliability mixed-grained reconfigurable architecture supporting behavioral synthesis Hiroaki Konoura, Dawood Alnajjar (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. Tech.), Hiroyuki Ochi (Ritsumeikan Univ.), Takashi Imagawa (Kyoto Univ.), Shinichi Noda, Kazutoshi Wakabayashi (NEC), Masanori Hashimoto, Takao Onoye (Osaka Univ.) RECONF2013-8 |
This paper proposes a mixed-grained reconfigurable architecture that supports C-based behavioral synthesis and flexibl... [more] |
RECONF2013-8 pp.41-46 |
| VLD | 2013-03-06 10:30 |
Okinawa | Okinawa Seinen Kaikan | A worst-case-aware design methodology for oscillator-based true random number generator with stochastic behavior modeling Takehiko Amaki, Masanori Hashimoto (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. of Tech.), Takao Onoye (Osaka Univ.) VLD2012-154 |
This paper presents a worst-case-aware design methodology for an oscillator-based true random number generator (TRNG) ro... [more] | VLD2012-154 pp.99-104 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 14:30 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | An observational study on fault-avoidance methods using dynamic partial reconfiguration Hiroaki Konoura (Osaka Univ.), Takashi Imagawa (Kyoto Univ.), Yukio Mitsuyama (Kochi Univ. of Tech.), Masanori Hashimoto, Takao Onoye (Osaka Univ.) RECONF2012-59 |
Fault-avoidance methods using dynamic partial reconfiguration on reconfigurable devices are proposed for avoiding the em... [more] | RECONF2012-59 pp.71-76 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 14:55 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | Neutron Induced Single Event Multiple Transients With Voltage Scaling and Body Biasing Ryo Harada (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. of Tech.), Masanori Hashimoto, Takao Onoye (Osaka Univ.) VLD2012-100 DC2012-66 |
This paper presents measurement results of neutron induced single event multiple transients (SEMT). We devise an SEMT me... [more] | VLD2012-100 DC2012-66 pp.237-241 |
| RECONF | 2011-05-12 13:55 |
Hokkaido | Hokkaido Univ. (Faculty of Eng., B3 Bldg.) | Evaluation of reliability enhancement achieved by fault avoidance on dynamically reconfigurable architectures Hiroaki Konoura (Osaka Univ.), Yukio Mitsuyama (Kochi Univ. Tech.), Masanori Hashimoto, Takao Onoye (Osaka Univ.) RECONF2011-6 |
For wear-out failures, some fault avoidance methods on dynamically reconfigurable devices have been discussed. In order... [more] | RECONF2011-6 pp.31-36 |
| VLD | 2010-09-28 15:25 |
Kyoto | Kyoto Institute of Technology | Measurement Circuits for Acquiring SET PulseWidth Distribution with Fine Time Resolution Ryo Harada, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye (Osaka Univ.) VLD2010-55 |
This paper presents two circuits to measure pulse width distribution of single event transients (SETs). We first revie... [more] |
VLD2010-55 pp.77-82 |
| VLD | 2009-03-13 10:40 |
Okinawa | Layout Aware Cell Clustering for Body Biasing Koichi Hamamoto (Osaka Univ.), Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye (Osaka Univ./JST-CREST) VLD2008-159 |
Body bias control has been widely studied for performance compensation. In order to reduce leakage increase involved by ... [more] | VLD2008-159 pp.195-200 |
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| VLD | 2009-03-13 11:05 |
Okinawa | Correlation Verification between Transistor Variability Model with Body Biasing and Ring Oscillation Frequency in Subthreshold Circuits Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye (Osaka Univ./JST-CREST) VLD2008-160 |
This paper presents modeling of manufacturing variability and body bias effect for subthreshold circuits based on mea... [more] |
VLD2008-160 pp.201-206 |
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| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 15:40 |
Fukuoka | Kitakyushu Science and Research Park | Coarse-Grained Reconfigurable Architecture with Flexible Reliability Younghun Ko, Dawood Alnajjar, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye (Osaka Univ.) VLD2008-73 DC2008-41 |
Acceptable soft error rate on a VLSI chip varies depending on applications and operating environment so that recent VLSI... [more] | VLD2008-73 DC2008-41 pp.79-84 |
| VLD, CAS, SIP | 2008-06-26 15:05 |
Hokkaido | Hokkaido Univ. | An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability Koichi Hamamoto, Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye (Osaka Univ.) CAS2008-14 VLD2008-27 SIP2008-48 |
Body-biasing is expected to be a common design technique, then area efficient implementation in layout has been demanded... [more] | CAS2008-14 VLD2008-27 SIP2008-48 pp.75-79 |
| RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2006-11-30 13:55 |
Fukuoka | Kitakyushu International Conference Center | Area-Efficient Reconfigurable Architecture for Media Processing Kazuma Takahashi, Yukio Mitsuyama, Takao Onoye (Osaka Univ.), Isao Shirakawa (Univ. of Hyogo) |
[more] | RECONF2006-51 pp.43-48 |
| IE, SIP, ICD, IPSJ-SLDM | 2004-10-22 13:50 |
Yamagata | Implementation of IEEE802.11i Cipher Algorithms for Embedded Systems Motoki Kimura, Yukio Mitsuyama, Takao Onoye (Osaka Univ.), Isao Shirakawa (Hyogo Univ.) |
[more] | SIP2004-97 ICD2004-129 IE2004-73 pp.49-54 |
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