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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM, ICD 2011-08-26
15:05
Toyama Toyama kenminkaikan A 28-nm dual-port SRAM macro with active bitline equalizing circuitry against write disturb issue
Yuichiro Ishii, Hidehiro Fujiwara, Koji Nii (Renesas Electronics), Hideo Chigasaki, Osamu Kuromiya, Tsukasa Saiki (Renesas Design), Atsushi Miyanishi, Yuji Kihara (Renesas Electronics) SDM2011-92 ICD2011-60
We propose circuit techniques for an 8T dual-port (DP) SRAM to improve its minimum operating voltage (Vddmin). Active bi... [more] SDM2011-92 ICD2011-60
pp.109-114
ICD 2010-04-22
09:50
Kanagawa Shonan Institute of Tech. [Invited Talk] Challenging for an ultra low-voltage SRAM by innovative design circuits and device technologies -- A 0.5V 100MHz PD-SOI SRAM using Asymmetric MOSFET and Forward Body Bias --
Koji Nii, Makoto Yabuuchi, Yasumasa Tsukamoto, Yuuichi Hirano, Toshiaki Iwamatsu, Yuji Kihara (Renesas Electronics) ICD2010-2
We investigate 0.5V 6T-SRAM with asymmetric MOSFET, which contributes to enhance the read and write margin. We also intr... [more] ICD2010-2
pp.7-12
ICD, ITE-CE 2007-12-13
16:25
Kochi   A new SRAM memory cell with small cell ratio using dynamic stability
Yuji Kihara (Renesas Technology), Yutaka Arita (Fujita Health University Collage), Leona Okamura (Waseda University Graduated School), Hirotoshi Sato (Renesas Technology), Tsutomu Yoshihara (Waseda University Graduated School) ICD2007-126
 [more] ICD2007-126
pp.37-40
ICD 2006-04-14
09:05
Oita Oita University Pipelined Self Reference Read Scheme for MRAM
Leona Okamura (Waseda Univ.), Yuji Kihara (Renesas Technology Inc.), Kim Tae Yun, Fuminori Kimura, Yusuke Matsui (Waseda Univ.), Tsukasa Oishi (Renesas Technology Inc.), Tsutomu Yoshihara (Waseda Univ.)
 [more] ICD2006-11
pp.57-62
ICD 2006-04-14
11:15
Oita Oita University DRAM技術を用いた16M SRAM
Yuji Kihara, Yasushi Nakashima, Takashi Izutsu, Masayuki Nakamoto (Renesas), Tsutomu Yoshihara (Waseda Univ.)
A 16Mbit Low Power SRAM with 0.98um2 cells using 0.15um DRAM and TFT technology has been developed. A new type memory ce... [more] ICD2006-15
pp.81-84
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