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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 11 of 11  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2012-11-28
10:30
Fukuoka Centennial Hall Kyushu University School of Medicine A LSI-Package-Board co-evaluation of Power noise in the Digital LSI
Kumpei Yoshikawa, Yuta Sasaki (Kobe Univ.), Kouji Ichikawa (DENSO), Yoshiyuki Saito (Panasonic), Makoto Nagata (Kobe Univ.) VLD2012-91 DC2012-57
Problems related with power noise in LSI system are getting prominent
because of the higher integration and lower $V_{d... [more]
VLD2012-91 DC2012-57
pp.183-188
EMCJ 2012-04-20
13:25
Ishikawa Kanazawa Univ. Proposal of a new technique and probe for the current measurement of each pin in a BGA package
Takeshi Nakayama, Daisaku Kitagawa, Masahiro Ishii, Yoshiyuki Saito (Panasonic) EMCJ2012-3
To maintain operational stability of LSI, power supply and ground pin count has increased. This is one of the factors of... [more] EMCJ2012-3
pp.13-18
EMCJ 2012-04-20
13:50
Ishikawa Kanazawa Univ. Placement optimization of the ground pins based on the measurement results of the currents flowing through each ground pin
Takeshi Nakayama, Daisaku Kitagawa, Masahiro Ishii, Yoshiyuki Saito (Panasonic) EMCJ2012-4
To maintain operational stability of LSI, power supply and ground pin count has increased. This is one of the factors of... [more] EMCJ2012-4
pp.19-24
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-30
09:25
Miyazaki NewWelCity Miyazaki Measurements and Co-Simulation of On-Chip and On-Boad AC Power Noise in Digital Integrated Circuits
Kumpei Yoshikawa, Yuta Sasaki (Kobe Univ.), Kouji Ichikawa (DENSO), Yoshiyuki Saito (Panasonic), Makoto Nagata (Kobe Univ./CREST,JST) CPM2011-163 ICD2011-95
Power noise of an integrated circuit (IC) chip is dominantly characterized by the frequency-domain impedance of a chip-p... [more] CPM2011-163 ICD2011-95
pp.73-78
EMCJ 2011-07-14
10:55
Tokyo Kikai-Shinko-Kaikan Bldg. Analysis of High Frequency Currents Due to Functional Block Activity Depending on Programs and Data in Power Supply System of LSI
Yukishige Sugimoto, Yoshiyuki Saito, Tohlu Matsushima, Osami Wada (Kyoto Univ.) EMCJ2011-48
The authers have developed an EMC macro-model, LECCS-core model, in order to simulate high frequency currents generated ... [more] EMCJ2011-48
pp.25-30
EMCJ, IEE-EMC 2010-06-18
11:10
Osaka Osaka Univ. Linear Equivalent Circuit Model of Inverter in Microwave Oven for EMI Filter Design
Kengo Iokibe (Okayama Univ.), Tetsushi Watanabe (Industrial Technology Center of Okayama Pref.), Kazuyuki Sakiyama, Yoshiyuki Saito (Panasonic), Yoshitaka Toyota, Ryuji Koga (Okayama Univ.) EMCJ2010-14
A Linear equivalent circuit model of inverter was proposed for applying to designing EMC filters to reduce the conducted... [more] EMCJ2010-14
pp.25-30
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2009-12-02
14:25
Kochi Kochi City Culture-Plaza [Invited Talk] Noise characteristics improvement of an LSI by using an interposer embedded capacitors
Yoshiyuki Saito, Eiji Takahashi, Chie Sasaki (Panasonic), Yasuhiro Sugaya (Panasonic Electronic Devices) CPM2009-140 ICD2009-69
 [more] CPM2009-140 ICD2009-69
pp.35-39
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2009-12-02
16:00
Kochi Kochi City Culture-Plaza [Panel Discussion] EMC Circuit Design and Jisso Design for System LSI -- Proposal for Circuit Design Managing EMC and Jisso Issue from Jisso-side --
Hideki Osaka (HITACHI Ltd.), Hideki Asai (Shizuoka Univ.), Hidefumi Ibe (HITACHI Ltd.), Yoshiyuki Saito (Panasonic), Takashi Harada (NEC), Narimasa Takahashi (IBM Japan) CPM2009-142 ICD2009-71
Nowadays, a JISSO design is very important to get the target performance out of a system LSI. More specifically, co-desi... [more] CPM2009-142 ICD2009-71
pp.47-49
EMCJ 2008-12-19
10:50
Gifu Gifu Univ. LECCS-core Model Including Inter-Block Coupling in Multiple Power-Supply Pin LSI
Masakatsu Yasuhara, Yoshihiro Funato, Yoshiyuki Saito, Umberto Paoletti, Takashi Hisakado, Osami Wada (Kyoto Univ.) EMCJ2008-90
An EMC macro model of an LSI called LECCS-core model is under development for simulation of high frequency noise of powe... [more] EMCJ2008-90
pp.25-30
EMCJ 2008-01-25
14:00
Saga Saga University An evaluation of the measurement method for Fully Anechoic Room
Hiroyoshi Tagi, Yoshiyuki Saito, Yukihiro Fukumoto, Takuya Nakamori, Masataka Inoue, Katsuo Ishihara (MEI) EMCJ2007-111
According to the current standards of EMC, the radiated emission level is measured as the electric field strength of syn... [more] EMCJ2007-111
pp.31-36
EMCJ 2005-03-10
16:40
Tokyo Kikai-Shinko-Kaikan Bldg. Construction of LECCS-core Model for Multiple Power-supply LSI by S-parameter Measurement
Yuichiro Minamisawa, Arinobu Ohta, Tomohiro Toyota, Katsumi Nakamura, Osami Wada, Yoshitaka Toyota, Ryuji Koga (Okayama Univ.), Yoshiyuki Saito (Matsushita Electric Industrial), Atsushi Nakamura (Renesas Technology)
The authors proposed a multiple-port LECCS-core model as a macro model for EMC simulation of a multiple power-supply pin... [more] EMCJ2004-161
pp.85-90
 Results 1 - 11 of 11  /   
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