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Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2010-09-17
13:40		 Shizuoka Shizuoka University (Faculty of Eng., Hall 2) Implementation and Evaluation of ScalableCore System 2.0
Yoshito Sakaguchi, Shinya Takamaeda, Kenji Kise (Tokyo Tech) RECONF2010-38		 ScalableCore is a concept of prototyping system development by using a lot of FPGAs for Many-core architecture researche... [more] RECONF2010-38
pp.121-126
CPSY, DC
(Joint)		 2010-08-03
- 2010-08-05		 Ishikawa Kanazawa Cultural Hall Implementaton and evaluation of light weight high speed serial communications with Error Correcting Code
Yoshito Sakaguchi, Mochamad Asri, Shinya Takamaeda, Haruhiko Kaneko, Kenji Kise (Tokyo Inst. of Tech.) CPSY2010-19		 Errror correcting code is required, which is capable enough of correctiong errors, implementable with
low resources and... [more]		 CPSY2010-19
pp.67-72
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