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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD | 2015-04-16 16:05 |
Nagano | [Invited Lecture]
A Low-Power 64Gb MLC NAND-Flash Memory in 15nm CMOS Technology Mario Sako, Takao Nakajima, Junpei Sato, Kazuyoshi Muraoka, Masaki Fujiu, Fumihiro Kono, Michio Nakagawa, Masami Masuda, Koji Kato, Yuri Terada, Yuki Shimizu, Mitsuaki Honma, Yoshinao Suzuki, Yoshihisa Watanabe (Toshiba), Ryuji Yamashita (SanDisk)  ICD2015-6 |
A 75mm2 low power 64Gb MLC NAND flash memory capable of 30MB/s program throughput and 533MB/s data transfer rate at 1.8V... [more] | ICD2015-6 pp.27-30 |
|
| ICD | 2012-04-23 13:20 |
Iwate | Seion-so, Tsunagi Hot Spring (Iwate) | [Invited Talk]
128Gb 3-Bit Per Cell NAND Flash Memory on 19nm Technology with 18MB/s Write Rate Teruhiko Kamei, Yan Li, Seungpil Lee, Ken Oowada, Hao Nguyen, Qui Nguyen, Nima Mokhlesi, Cynthia Hsu, Jason Li, Venky Ramachandra, Masaaki Higashitani, Tuan Pham, Mitsuyuki Watanabe (SanDisk), Mitsuaki Honma, Yoshihisa Watanabe (Toshiba) ICD2012-2 |
A 128Gb 8-level NAND flash memory using 19nm CMOS technology has been developed. 128Gb is the largest single-chip capaci... [more] | ICD2012-2 pp.7-12 |
| ICD | 2011-04-18 13:30 |
Hyogo | Kobe University Takigawa Memorial Hall | [Invited Talk]
Technology Trend of NAND Flash Memories
-- A 151mm2 64Gb 2b/cell NAND Flash Memory in 24nm CMOS Technology -- Koichi Fukuda, Yoshihisa Watanabe, Eiichi Makino, Koichi Kawakami, Junpei Sato, Teruo Takagiwa, Naoaki Kanagawa, Hitoshi Shiga, Naoya Tokiwa, Yoshihiko Shindo, Toshiaki Edahiro, Takeshi Ogawa, Makoto Iwai (Toshiba), Kiyofumi Sakurai (Toshiba Memory Systems), Toru Miwa (SanDisk) ICD2011-4 |
A 64Gbit 2bit/cell NAND flash memory capable of 14MB/s programming and 266MB/s data transfer is fabricated in 24nm techn... [more] | ICD2011-4 pp.19-26 |
| WBS | 2007-10-16 10:55 |
Hiroshima | Performance Evaluation of a Channel Shortening Technique in block transmissions with correlated sources Yoshihisa Watanabe, Teruyuki Miyajima (Ibaraki Univ.) WBS2007-44 |
In block transmittion systems, if a channel impulse response is longer than cyclic prefix length, there is a performan... [more] |
WBS2007-44 pp.31-36 |
|
| WBS, SAT (Joint) |
2007-06-06 09:50 |
Ibaraki | Ibaraki Univ. | Performance Evaluation of Channel Shortening Using Correlation Characteristics of Transmitted Signal Yoshihisa Watanabe, Teruyuki Miyajima (Ibaraki Univ.) WBS2007-8 |
This paper considers blind channel shortening methods to reduce the influence of interblock interference in block tran... [more] |
WBS2007-8 pp.13-18 |
| ICD | 2006-04-14 15:10 |
Oita | Oita University | A 56nm CMOS 99mm2 8Gb Multi-level NAND Flash Memory with 10MB/s Program Throughput Makoto Iwai, Ken Takeuchi, Yasushi Kameda, Susumu Fujimura, Hiroyuki Otake, Koji Hosono, Hitoshi Shiga, Yoshihisa Watanabe, Takuya Futatsuyama, Yoshihiko Shindo, Masatsugu Kojima, Masanobu Shirakawa, Masayuki Ichige, Kazuo Hatakeyama, Shinichi Tanaka (Toshiba) |
[more] | ICD2006-21 pp.115-120 |
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