Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SDM |
2018-10-17 14:00 |
Miyagi |
Niche, Tohoku Univ. |
[Invited Talk]
Fin-FET MONOS for Next Generation Automotive-MCU Shibun Tsuda, Tomoya Saito, Hirokazu Nagase, Yoshiyuki Kawashima, Atsushi Yoshitomi, Shinobu Okanishi, Tomohiro Hayashi, Takuya Maruyama, Masao Inoue, Seiji Muranaka, Shigeki Kato, Takuya Hagiwara, Hirokazu Saito, Tadashi Yamaguchi, Masaru Kadoshima, Takahiro Maruyama, Tatsuyoshi Mihara, Hiroshi Yanagita, Kenichiro Sonoda, Yasuo Yamaguchi, Tomohiro Yamashita (Renesas) SDM2018-52 |
[more] |
SDM2018-52 pp.1-5 |
SDM |
2018-01-30 14:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Reliability and Scalability of FinFET Split-Gate MONOS Array with Tight Vth Distribution for 16/14nm-node Embedded Flash Shibun Tsuda, Tomoya Saito, Hirokazu Nagase, Yoshiyuki Kawashima, Atsushi Yoshitomi, Shinobu Okanishi, Tomohiro Hayashi, Takuya Maruyama, Masao Inoue, Seiji Muranaka, Shigeki Kato, Takuya Hagiwara, Hirokazu Saito, Tadashi Yamaguchi, Masaru Kadoshima, Takahiro Maruyama, Tatsuyoshi Mihara, Hiroshi Yanagita, Kenichiro Sonoda, Tomohiro Yamashita, Yasuo Yamaguchi (renesas) SDM2017-94 |
Reliability and scalability of split-gate metal-oxide nitride oxide silicon (SG-MONOS) are discussed for 16/14nm-node em... [more] |
SDM2017-94 pp.13-16 |
SDM |
2017-11-09 13:05 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Simple and efficient approach to improve hot carrier immunity of a p-LDMOSFET Atsushi Sakai, Katsumi Eikyu (REL), Fujii Hiroki, Takahiro Mori (RSMC), Yutaka Akiyama, Yasuo Yamaguchi (REL) SDM2017-63 |
This paper proposes a simple and efficient method to improve hot carrier (HC) immunity of p-channel LDMOSFET without deg... [more] |
SDM2017-63 pp.11-14 |
ICD |
2017-04-20 14:55 |
Tokyo |
|
[Invited Lecture]
First demonstration of FinFET Split-Gate MONOS for High-Speed and Highly-Reliable Embedded Flash in 16/14nm-node and beyond Shibun Tsuda, Yoshiyuki Kawashima, Kenichiro Sonoda, Atsushi Yoshitomi, Tatsuyoshi Mihara, Shunichi Narumi, Masao Inoue, Seiji Muranaka, Takahiro Maruyama, Tomohiro Yamashita, Yasuo Yamaguchi (Renesas Electronics), Digh Hisamoto (Hitachi) ICD2017-7 |
FinFET split-gate metal-oxide nitride oxide silicon (SG-MONOS) Flash memories have been fabricated and operated for the ... [more] |
ICD2017-7 pp.35-38 |
ICD |
2017-04-20 15:20 |
Tokyo |
|
[Invited Talk]
Embedded Flash Technology for Automotive Applications Masaya Nakano, Takashi Ito, Tadaaki Yamauchi, Yasuo Yamaguchi, Takashi Kono, Hideto Hidaka (Renesas Electronics) ICD2017-8 |
Higher fuel-efficient engine and advanced driver assistance system (ADAS) require the further progress of embedded Flash... [more] |
ICD2017-8 pp.39-44 |
SDM |
2017-01-30 13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
First Demonstration of FinFET Split-Gate MONOS for High-Speed and Highly-Reliable Embedded Flash in 16/14nm-node and Beyond Shibun Tsuda, Yoshiyuki Kawashima, Kenichiro Sonoda, Atsushi Yoshitomi, Tatsuyoshi Mihara, Shunichi Narumi, Masao Inoue, Seiji Muranaka, Takahiro Maruyama, Tomohiro Yamashita, Yasuo Yamaguchi (Renesas Electronics), Digh Hisamoto (Hitachi) SDM2016-134 |
FinFET split-gate metal-oxide nitride oxide silicon (SG-MONOS) Flash memories have been fabricated and operated for the ... [more] |
SDM2016-134 pp.17-20 |
SDM |
2016-10-26 15:30 |
Miyagi |
Niche, Tohoku Univ. |
[Invited Talk]
Back-Bias Control Technique for Suppression of Die-to-Die Delay Variability of SOTB CMOS Circuits at Ultralow-Voltage (0.4 V) Operation Hideki Makiyama, Yoshiki Yamamoto, Takumi Hasegawa, Shinobu Okanishi, Keiichi Maekawa, Hiroki Shinkawata, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitach), Koichiro Ishibashi (The Univ. of Electro-Communications), Tomoko Mizutani, Toshiro Hiramoto (The Univ. of Tokyo) SDM2016-71 |
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] |
SDM2016-71 pp.15-20 |
SDM |
2016-10-26 16:10 |
Miyagi |
Niche, Tohoku Univ. |
[Invited Talk]
Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias Yoshiki Yamamoto, Hideki Makiyama, Takumi Hasegawa, Shinobu Okanishi, Keiichi Maekawa, Shinkawata Hiroki, Shiro Kamohara, Yasuo Yamaguchi (Renesas), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Toshiro Hiramoro (UT) SDM2016-72 |
We demonstrated record 0.37V minimum operation voltage (VMIN) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks... [more] |
SDM2016-72 pp.21-25 |
SDM |
2015-11-06 14:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Impacts of the 4H-SiC/SiO2 Interface States on the Switching Operation of Power MOSFETs Atsushi Sakai, Katsumi Eikyu, Kenichiro Sonoda (REL), Kenichi Hisada, Koichi Arai, Yoichi Yamamoto (RSMC), Motoaki Tanizawa, Yasuo Yamaguchi (REL) SDM2015-91 |
[more] |
SDM2015-91 pp.39-43 |
SDM, ICD |
2015-08-24 10:20 |
Kumamoto |
Kumamoto City |
Development of a compacted doubly nesting array in Narrow Scribe Line aimed at detecting soft failures of interconnect via Hiroki Shinkawata, Nobuo Tsuboi (REL), Atsushi Tsuda (RSD), Shingo Sato (Kansai), Yasuo Yamaguchi (REL) SDM2015-58 ICD2015-27 |
We introduce a new addressable test structure array using for mass production stage which is compacted doubly nesting ar... [more] |
SDM2015-58 ICD2015-27 pp.7-10 |
SDM, ICD |
2015-08-25 10:55 |
Kumamoto |
Kumamoto City |
[Invited Talk]
Novel Single p+Poly-Si/Hf/SiON Gate Stack Technology on Silicon-on-Thin-Buried-Oxide (SOTB) for Ultra-Low Leakage Applications Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Masaharu Kobayashi, Toshiro Hiramoto (UT) SDM2015-67 ICD2015-36 |
We demonstrate a cost effective 65-nm SOTB CMOS technology for ultra-low leakage applications. Novel single p+poly-Si/Hf... [more] |
SDM2015-67 ICD2015-36 pp.53-57 |
SDM |
2014-10-17 14:30 |
Miyagi |
Niche, Tohoku Univ. |
[Invited Talk]
Back-Bias Control technique for Suppression of Die-to-Die Delay Variability of SOTB MOS Circuits at Ultralow-Voltage (0.4 V) Operation Hideki Makiyama, Yoshiki Yamamoto, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii, Yasuo Yamaguchi (LEAP), Koichiro Ishibashi (Univ. of Electro-Communications), Tomoko Mizutani, Toshiro Hiramoto (Univ. of Tokyo) SDM2014-94 |
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] |
SDM2014-94 pp.61-68 |
ICD, SDM |
2014-08-04 09:00 |
Hokkaido |
Hokkaido Univ., Multimedia Education Bldg. |
[Invited Talk]
A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA Sleep Current using Reverse-Body-Bias Assisted 65nm SOTB CMOS Technology Koichiro Ishibashi (UEC), Nobuyuki Sugii (LEAP), Kimiyoshi Usami (SIT), Hideharu Amano (KU), Kazutoshi Kobayashi (KIT), Cong-Kha Pham (UEC), Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Yasuo Yamaguchi, Hidekazu Oda, Takumi Hasegawa, Shinobu Okanishi, Hiroshi Yanagita (LEAP) SDM2014-62 ICD2014-31 |
[more] |
SDM2014-62 ICD2014-31 pp.1-4 |
ICD |
2014-04-18 09:55 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Lecture]
Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Nobuyuki Sugii, Yasuo Yamaguchi (LEAP), Tomoko Mizutani, Toshiro Hiramoto (UTokyo) ICD2014-11 |
We demonstrated record 0.37V minimum operation voltage (VMIN) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks... [more] |
ICD2014-11 pp.53-57 |
SDM |
2014-01-29 14:40 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Suppression of Die-to-Die Delay Variability of Silicon on Thin Buried Oxide (SOTB) CMOS Circuits by Balanced P/N Drivability Control with Back-Bias for Ultralow-Voltage (0.4 V) Operation Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Hidekazu Oda, Nobuyuki Sugii (LEAP), Koichiro Ishibashi (Univ. of Electro- Comm.), Tomoko Mizutani, Toshiro Hiramoto (Univ. of Tokyo), Yasuo Yamaguchi (LEAP) SDM2013-143 |
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] |
SDM2013-143 pp.35-38 |
SDM |
2013-11-14 14:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
The effect of incorporated elements in nitrogen vacancies on electron trap level in silicon nitride Kenichiro Sonoda, Eiji Tsukuda, Motoaki Tanizawa, Kiyoshi Ishikawa, Yasuo Yamaguchi (Renesas Electronics) SDM2013-103 |
[more] |
SDM2013-103 pp.21-26 |
ICD, SDM |
2012-08-02 13:00 |
Hokkaido |
Sapporo Center for Gender Equality, Sapporo, Hokkaido |
[Invited Lecture]
Silicon on Thin Buried Oxide (SOTB) Technology for Ultralow-Power (ULP) Applications Nobuyuki Sugii, Toshiaki Iwamatsu, Yoshiki Yamamoto, Hideki Makiyama, Takaaki Tsunomura, Hirofumi Shinohara, Hideki Aono, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (LEAP/Renesas), Tomoko Mizutani, Toshiro Hiramoto (IIS, The University of Tokyo) SDM2012-68 ICD2012-36 |
Needs for low-power CMOS devices are still increasing. Ultralow-voltage-operation (ULV) CMOS with maximum power efficien... [more] |
SDM2012-68 ICD2012-36 pp.29-32 |
SDM, ED (Workshop) |
2012-06-29 09:45 |
Okinawa |
Okinawa Seinen-kaikan |
[Invited Talk]
Silicon on Thin Buried Oxide (SOTB) Technology for Ultralow-Power (ULP) Applications Nobuyuki Sugii, Toshiaki Iwamatsu, Yoshiki Yamamoto, Hideki Makiyama, Takaaki Tsunomura, Hirofumi Shinohara, Hideki Aono, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (LEAP/Renesas), Tomoko Mizutani, Toshiro Hiramoto (IIS, Univ. of Tokyo) |
Needs for low-power CMOS devices are still increasing. Ultralow-voltage-operation CMOS with maximum power efficiency can... [more] |
|
ICD, SDM |
2006-08-18 14:35 |
Hokkaido |
Hokkaido University |
A 65 nm SoC Embedded 6T-SRAM Design for Manufacturing with Read and Write Cell Stabilizing Circuits Makoto Yabuuchi, Shigeki Ohbayashi, Koji Nii, Yasumasa Tsukamoto (Renesas Technology), Susumu Imaoka (Renesas Design), Motoshige Igarashi, Masahiko Takeuchi, Hiroshi Kawashima, Hiroshi Makino, Yasuo Yamaguchi, Kazuhiro Tsukamoto, Masahide Inuishi, Koichiro Ishibashi, Hirofumi Shinohara (Renesas Technology) |
[more] |
SDM2006-151 ICD2006-105 pp.149-153 |
|