IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 18 of 18  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
HWS, VLD 2019-03-01
15:45
Okinawa Okinawa Ken Seinen Kaikan On Machine Learning Attack Tolerance for PUF-based Device Authentication System
Tomoki Iizuka (UTokyo), Yasuhiro Ogasahara, Toshihiro Katashita, Yohei Hori (AIST), Hiromitsu Awano (Osaka Univ.), Makoto Ikeda (UTokyo) VLD2018-133 HWS2018-96
Double-Arbiter PUF (DAPUF) and PL-PUF are known to be highly resistant to machine learning attacks.
In this paper, we p... [more]
VLD2018-133 HWS2018-96
pp.237-242
VLD, HWS
(Joint)
2018-03-02
14:05
Okinawa Okinawa Seinen Kaikan PL-PUF Implementation by Improvement of Capturing Timing Control Circuit
Yasuhiro Ogasahara, Yohei Hori, Hanpei Koike (AIST) VLD2017-126
In this study, we demonstrate the first implementation of a pseudo linear feedback shift register physical unclonable fu... [more] VLD2017-126
pp.225-229
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2017-11-06
14:30
Kumamoto Kumamoto-Kenminkouryukan Parea Reduction of Overhead in Adaptive Body Bias Technology due to Triple-well Structure
Yasuhiro Ogasahara, Toshihiro Sekigawa, Hanpei Koike (AIST) VLD2017-32 DC2017-38
 [more] VLD2017-32 DC2017-38
pp.31-35
VLD, DC, CPSY, RECONF, CPM, ICD, IE
(Joint) [detail]
2016-11-29
09:00
Osaka Ritsumeikan University, Osaka Ibaraki Campus Measurement of Vth Variation due to STI Stress and Inverse Narrow Channel Effect at Ultra-Low Voltage in a Variability-Suppressed Process
Yasuhiro Ogasahara, Hanpei Koike (AIST) CPM2016-76 ICD2016-37 IE2016-71
This paper demonstrates notable impact of Vth shift due to STI-induced dopant redistribution on ultra-low voltage design... [more] CPM2016-76 ICD2016-37 IE2016-71
pp.1-6
ICD, SDM, ITE-IST [detail] 2016-08-03
14:15
Osaka Central Electric Club Impacts of Flexible V_th control and Low Process Variability of SOTB to Ultra-low Voltage Designs
Yasuhiro Ogasahara (AIST) SDM2016-65 ICD2016-33
This paper discusses impacts of flexible Vth control, low process variability, and steep SS with small on-current of new... [more] SDM2016-65 ICD2016-33
pp.111-116
RECONF 2015-06-19
11:35
Kyoto Kyoto University Evaluation of the third Flex Power FPGA chip in SOTB technology
Masakazu Hioki, Yasuhiro Ogasahara, Hanpei Koike (AIST) RECONF2015-3
This paper reports the evaluation of the third Flex Power FPGA chip in SOTB technology. Fabricated chip aims to shrink a... [more] RECONF2015-3
pp.13-16
RECONF 2015-06-20
14:00
Kyoto Kyoto University On the Evaluation Board AISTino equipped with the Fourth Flex Power FPGA chip with SOTB transistors
Hanpei Koike, Masakazu Hioki, Yasuhiro Ogasahara (AIST), Hayato Ishigaki, Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa (AIST) RECONF2015-22
Flex Power FPGA utilizes threshold voltage programmability to reduce its static power by the body bias control of circui... [more] RECONF2015-22
pp.119-124
RECONF 2014-09-18
17:20
Hiroshima   On The Second Flex Power FPGA Chip with SOTB Transistors
Hanpei Koike (AIST), Chao Ma (Meiji Univ.), Masakazu Hioki, Yasuhiro Ogasahara (AIST), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa (AIST) RECONF2014-24
 [more] RECONF2014-24
pp.41-46
RECONF 2014-06-12
10:25
Miyagi Katahira Sakura Hall Improvement of Implementability by Exploring Routing Architecture in Flex Power FPGA
Masakazu Hioki, Toshihiro Sekigawa, Tadashi Nakagawa, Yasuhiro Ogasahara (AIST), Toshiyuki Tsutsumi (Meiji Univ.), Hanpei Koike (AIST) RECONF2014-5
(To be available after the conference date) [more] RECONF2014-5
pp.21-25
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-28
13:45
Kagoshima   Evaluation of The First Flex Power FPGA chip with SOTB transistors
Chao Ma (AIST/Meiji Univ.), Masakazu Hioki (AIST), Takashi Kawanami (KIT), Yasuhiro Ogasahara, Tadashi Nakagawa, Toshihiro Sekigawa (AIST), Toshiyuki Tsutsumi (AIST/Meiji Univ.), Hanpei Koike (AIST) RECONF2013-53
Flex Power FPGA was able to utilize a programmable threshold voltage to each circuit block of the FPGA by using the body... [more] RECONF2013-53
pp.77-82
ICD 2010-12-16
13:00
Tokyo RCAST, Univ. of Tokyo [Invited Talk] Measurement and Characteristics Validation of On-chip Signal and Power Noise -- Looking back on my doctoral course --
Yasuhiro Ogasahara (Renesas Electronics Corp.) ICD2010-98
This paper describes measurement results of inductive coupling effect on timing, and validation of interconnect model. T... [more] ICD2010-98
pp.19-24
VLD, ICD 2008-03-06
15:45
Okinawa TiRuRu Superposition Effect Validation of Inductive Coupling Noise Based on Measurement of Interconnect Delay Variation
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye (Osaka Univ.) VLD2007-153 ICD2007-176
Inductive coupling is becoming a design concern for global interconnects in nano-meter technologies. This paper measures... [more] VLD2007-153 ICD2007-176
pp.55-60
CPM, ICD 2008-01-17
10:45
Tokyo Kikai-Shinko-Kaikan Bldg All Digital Gated Oscillator for Dynamic Supply Noise Measurement
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye (Osaka Univ.) CPM2007-131 ICD2007-142
This paper proposes an all digital measurement circuit called ``gated oscillator'' for capturing waveforms of dynamic po... [more] CPM2007-131 ICD2007-142
pp.17-22
ICD, CPM 2007-01-18
09:50
Tokyo Kika-Shinko-Kaikan Bldg. Measurement of Delay Variation Due to Inductive Coupling Noise in 90nm Global Interconnects
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye (Osaka Univ.)
Inductive coupling is becoming a design concern for global interconnects in nano-meter technologies. This paper shows me... [more] CPM2006-131 ICD2006-173
pp.13-18
ICD, CPM 2007-01-18
10:15
Tokyo Kika-Shinko-Kaikan Bldg. Measurement of Delay Degradation Due to Power Supply Noise and Delay Variation Estimation with Full-Chip Simulation
Yasuhiro Ogasahara, Takashi Enami, Masanori Hashimoto (Osaka Univ.), Takashi Sato (Tokyo Inst. Tech.), Takao Onoye (Osaka Univ.)
Power integrity is an crucial design issue in nano-meter technologies because of lowered supply voltage and current incr... [more] CPM2006-132 ICD2006-174
pp.19-23
CAS, SIP, CS 2006-03-06
11:35
Okinawa Univ of Ryukyu Wireless Network Protocol for Home Network Based on IEEE 802.15.4
Masanao Ise (Synthesis Corp.), Yasuhiro Ogasahara, Kenji Watanabe, Masahide Hatanaka, Takao Onoye (Osaka Univ.), Hiroaki Niwamoto, Ikuo Keshi (Sharp Corp.), Isao Shirakawa (Univ. of Hyogo)
Interest in a home network is increasing in accordance with enhancing features of household-electric-appliances and spre... [more] CAS2005-99 SIP2005-145 CS2005-92
pp.19-24
ICD, SDM 2005-08-18
13:00
Hokkaido HAKODATE KOKUSAI HOTEL Measurement and evaluation of delay variation due to inductive and capacitive coupling noise
Yasuhiro Ogasahara, Masanori Hashimoto, Takao Onoye (Osaka Univ.)
Capacitive coupling has been considered as a source of interconnect delay variation. Because of progressive increase in ... [more] SDM2005-135 ICD2005-74
pp.43-48
CAS 2005-01-20
12:55
Ishikawa Kanazawa Univ An Approach to Universal Plug and Play-based Home Network Architecture
Seung-Ryeol Rho, Yasuhiro Ogasahara, Masanao Ise, Masahide Hatanaka, Takao Onoye (Osaka Univ.), Hiroaki Niwamoto, Ikuo Keshi (Sharp Corp.), Isao Shirakawa (Univ. of Hyogo)
With great interest in home network, commercial home network services have been recently provided. However, the majority... [more] CAS2004-68
pp.7-12
 Results 1 - 18 of 18  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan